IP Library Granted Patent US 11,264,494
Granted Patent B2
US 11,264,494 · App. 16/763,542 · Granted Mar 1, 2022

Wide-gap semiconductor device

Inventor: Shunichi Nakamura (Saitama, JP)
Assignee: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
H01L29/7811H01L29/1095H01L29/1608H01L29/402H01L29/41741H01L29/4916H01L29/66068
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Quick Facts
Patent No.
US 11,264,494
App. No.
16/763,542
Granted
Mar 1, 2022
Kind
B2
Abstract

A wide gap semiconductor device has: a drift layer 12 using wide gap semiconductor material being a first conductivity type; a plurality of well regions 20 being a second conductivity type and formed in the drift layer 12 ; a polysilicon layer 150 provided on the well regions 20 and on the drift layer 12 between the well regions 20 ; an interlayer insulating film 65 provided on the polysilicon layer 150 ; a gate pad 120 provided on the interlayer insulating film 65 ; and a source pad 110 electrically connected to the polysilicon layer 150.

Claims (46)

1. A wide gap semiconductor device comprising:

a drift layer being a first conductivity type;

a plurality of well regions being a second conductivity type and formed in the drift layer;

a polysilicon layer provided on the well regions and on the drift layer between the well regions;

an interlayer insulating film provided on the polysilicon layer;

a gate pad provided on the interlayer insulating film; and

a source pad electrically connected to the polysilicon layer,

wherein a polysilicon layer has an undoped polysilicon layer provided on the drift layer and a doped polysilicon layer provided on the undoped polysilicon layer.

2. The wide gap semiconductor device according to claim 1 , wherein

second conductivity type regions are provided at predetermined intervals between the well regions.

3. The wide gap semiconductor device according to claim 2 , wherein

regions in contact with the polysilicon layer in the second conductivity type regions are superhigh-concentration second conductivity regions.

4. The wide gap semiconductor device according to claim 1 , wherein

the polysilicon layer and the drift layer are in Schottky contact.

5. A wide gap semiconductor device comprising:

a drift layer being a first conductivity type;

a plurality of well regions being a second conductivity type and formed in the drift layer;

a polysilicon layer provided on the well regions and on the drift layer between the well regions;

an interlayer insulating film provided on the polysilicon layer;

a gate pad provided on the interlayer insulating film; and

a source pad electrically connected to the polysilicon layer,

wherein a polysilicon layer has a lightly-doped polysilicon layer provided on the drift layer, and a heavily-doped polysilicon layer, which is provided on the lightly-doped polysilicon layer and has an impurity concentration higher than the impurity concentration of the lightly-doped polysilicon layer.

6. The wide gap semiconductor device according to claim 1 , wherein

a field insulating film is provided between the well region and the polysilicon layer.

7. The wide gap semiconductor device according to claim 6 , wherein

a superhigh-concentration second conductivity type region is provided in the well region and at a position below a boundary along an in-plane direction between the field insulating film and the polysilicon layer.

8. The wide gap semiconductor device according to claim 1 , wherein

a gate electrode is formed of polysilicon, which constitutes the polysilicon layer.

9. The wide gap semiconductor device according to claim 1 , wherein

a source region is provided in the well region, and

an well contact region, which is adjacent to the source region and is electrically connected to the source pad, in the well region is formed of a superhigh-concentration second conductivity type region.

10. The wide gap semiconductor device according to claim 5 , wherein

second conductivity type regions are provided at predetermined intervals between the well regions.

11. The wide gap semiconductor device according to claim 10 , wherein

regions in contact with the polysilicon layer in the second conductivity type regions are superhigh-concentration second conductivity regions.

12. The wide gap semiconductor device according to claim 5 , wherein

the polysilicon layer and the drift layer are in Schottky contact.

13. The wide gap semiconductor device according to claim 5 , wherein

a field insulating film is provided between the well region and the polysilicon layer.

14. The wide gap semiconductor device according to claim 13 , wherein

a superhigh-concentration second conductivity type region is provided in the well region and at a position below a boundary along an in-plane direction between the field insulating film and the polysilicon layer.

15. The wide gap semiconductor device according to claim 5 , wherein

a gate electrode is formed of polysilicon, which constitutes the polysilicon layer.

16. The wide gap semiconductor device according to claim 5 , wherein

a source region is provided in the well region, and

an well contact region, which is adjacent to the source region and is electrically connected to the source pad, in the well region is formed of a superhigh-concentration second conductivity type region.

Assignments (1)
NUNC PRO TUNC ASSIGNMENT Recorded Apr 14, 2021
From: NAKAMURA, SHUNICHI
To: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
Reel/Frame 055918/0602 →
Continuity (1)
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