IP Library Granted Patent US 11,269,767
Granted Patent B2
US 11,269,767 · App. 16/692,615 · Granted Mar 8, 2022

Memory controller and operating method thereof

Inventor: Eu Joon Byun (Gyeonggi-do, KR)
Assignee: SK hynix Inc.
G06F12/0253G06F3/061G06F3/0652G06F3/0659G06F3/0679G06F2212/1044
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Quick Facts
Patent No.
US 11,269,767
App. No.
16/692,615
Granted
Mar 8, 2022
Kind
B2
Abstract

A memory controller for performing garbage collection without moving data of a valid page, controls a memory device including a plurality of memory blocks in which data is stored. The memory controller includes a victim block setting circuit for selecting a victim block among the memory blocks by receiving memory block information representing whether a valid page and an invalid page are included in each of the plurality of memory blocks, when garbage collection is performed, and a sub-block controller for outputting a sub-block read command for determining valid pages included in each of sub-blocks within the victim block, by dividing the victim block into the sub-blocks, and outputting a sub-block erase command for selectively erasing a part of the sub-blocks included in the victim block, by receiving sub-block information corresponding to the sub-block read command from the memory device.

Claims (46)

1. A memory controller for controlling a memory device including a plurality of memory blocks in which data is stored, the memory controller comprising:

a victim block setting circuit configured to:

receive memory block information on numbers of valid pages and invalid pages, which are included in each of the plurality of memory blocks, and

select a victim block among the memory blocks based on the memory block information, when garbage collection is performed; and

a sub-block controller configured to:

divide the victim block into sub-blocks including a plurality of pages,

output a sub-block read command for determining valid pages in which valid data is stored among the plurality of pages,

receive sub-block information representing the valid pages included in each of the sub-blocks, among the plurality of pages, corresponding to the sub-block read command from the memory device,

determine target sub-blocks including only invalid pages among the sub-blocks based on the sub-block information, and

output a sub-block erase command for selectively erasing a part of the victim block, to the target sub-blocks.

2. The memory controller of claim 1 , wherein the sub-block information represents whether only invalid pages are included in each of the sub-blocks within the victim block.

3. The memory controller of claim 2 , wherein the sub-block controller determines whether a sub-block including at least one valid page and at least one invalid page exists among the sub-blocks.

4. The memory controller of claim 3 , wherein the sub-block controller suspends an operation for erasing the sub-blocks in response to existence of the sub-block including at least one valid page and at least one invalid page.

5. The memory controller of claim 1 , wherein, when the sub-block erase command is output, the sub-block controller generates sub-block erase information indicating the sub-block to be erased corresponding to the sub-block erase command.

6. The memory controller of claim 5 , further comprising a bitmap controller configured to include a bit map for each of the plurality of memory blocks and control a bit value included in the bit map,

wherein the bit value included in the bitmap is determined for each of the sub-blocks.

7. The memory controller of claim 6 , wherein the bitmap controller changes a bit value corresponding to the sub-block to be erased and a bit value corresponding to a sub-block having only empty pages among bit values included in the bitmap corresponding to the victim block.

8. The memory controller of claim 7 , wherein, when the victim block becomes an open block after the sub-block included in the victim block is erased, a page in which new data received from a host is to be stored is determined based on the bitmap of the victim block.

9. The memory controller of claim 8 , wherein any one of pages included in a sub-block corresponding to the changed bit value among the bit values included in the bitmap of the victim block is determined as the page in which the new data received from the host is to be stored.

10. A method for operating a memory controller for controlling a memory device including a plurality of memory blocks in which data is stored, the method comprising:

receiving memory block information on numbers of valid pages and invalid pages, which are included in each of the plurality of memory blocks, when garbage collection is performed;

selecting a victim block among the memory blocks, based on the memory block information;

dividing the victim block into sub-blocks including a plurality of pages;

outputting a sub-block read command for determining valid pages in which valid data is stored among the plurality of pages;

receiving sub-block information representing the valid pages included in each of the sub-blocks, among the plurality of pages, corresponding to the sub-block read command from the memory device;

determining a sub-block including only invalid pages among the sub-blocks within the victim block based on the sub-block information; and

outputting a sub-block erase command for erasing the determined sub-block.

11. The method of claim 10 , wherein the determining of the sub-block including only invalid pages is performed by receiving the sub-block information representing whether only invalid pages are included in each of the sub-blocks within the victim block.

12. The method of claim 11 , wherein the determining of the sub-block including only invalid pages includes determining whether a sub-block including at least one valid page and at least one invalid page exists among the sub-blocks.

13. The method of claim 12 , further comprising suspending an operation for erasing the determined sub-block in response to existence of the sub-block including at least one valid page and at least one invalid page.

14. The method of claim 10 , further comprising changing a bit value included in a bitmap of the victim block, based on sub-block erase information,

wherein the bit value is set for each of the sub-blocks included in the victim block.

15. The method of claim 14 , wherein a bit value corresponding to the sub-block to be erased and a bit value corresponding to a sub-block having only empty pages among the bit values included in a bitmap corresponding to the victim block are changed.

16. The method of claim 15 , further comprising determining a page in which new data is to be stored, based on the bitmap of the victim block, when the victim block becomes an open block after the sub-block included in the victim block is erased.

17. The method of claim 16 , wherein any one of pages included in a sub-block corresponding to the changed bit value among the bit values included in the bitmap of the victim block is determined as the page in which the new data is to be stored.

18. A memory system comprising:

a memory device including a victim memory block having plural sub-blocks each having plural pages; and

a controller configured to:

control, during a garbage collection operation on the victim memory block, the memory device to select a sub-block having only invalid pages among the plural sub-blocks and erase the sub-block for selectively erasing a part of the victim memory block;

receive memory block information on numbers of valid pages and invalid pages, which are included in each of the plural sub-blocks from the memory device;

control the memory device to select a sub-block based on the memory block information, when garbage collection is performed;

control the memory device to output a sub-block read command for determining valid pages in which valid data is stored among the plural pages in a sub-block of the plural sub-blocks;

receive sub-block information representing the valid pages included in each of the plural sub-blocks, corresponding to the sub-block read command from the memory device;

determine target sub-blocks including only invalid pages among the sub-blocks within the victim block based on the sub-block information;

output a sub-block erase command for selectively erasing a part of the victim block, to the target sub-blocks; and

set the victim memory block as an open memory block without moving valid data from the victim memory block to any memory block.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 22, 2019
From: BYUN, EU JOON
To: SK HYNIX INC.
Reel/Frame 051090/0510 →
Priority Claims (1)
KR 10-2019-0082154 · Jul 8, 2019 · national
Continuity (1)
Related Publication 20210011844A1 · Jan 14, 2021
Cited By (3)
US 12,189,980 US 12,360,673 US 12,511,072