IP Library Granted Patent US 11,272,223
Granted Patent B2
US 11,272,223 · App. 17/198,901 · Granted Mar 8, 2022

Slicing and tiling in video coding

Inventors: Ye-Kui Wang (San Diego, CA); F N U Hendry (San Diego, CA); Jianle Chen (San Diego, CA)
Assignee: Huawei Technologies Co., Ltd.
H04N19/96H04N19/119H04N19/174H04N19/176H04N19/184H04N19/1883H04N19/46H04N19/70
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Quick Facts
Patent No.
US 11,272,223
App. No.
17/198,901
Granted
Mar 8, 2022
Kind
B2
Abstract

A video coding mechanism is disclosed. The mechanism includes receiving at a decoder, a bitstream including a video coding layer (VCL) network abstraction layer (NAL) unit containing a slice of image data divided into a plurality of tiles. A number of the tiles in the VCL NAL unit are determined. A number of entry point offsets for the tiles is also determined as one less than the number of the tiles in the VCL NAL unit. Each entry point offset indicates a starting location of a corresponding tile in the VCL NAL unit. The number of entry point offsets is not explicitly signaled in the bitstream. The entry point offsets for the tiles are obtained based on the number of entry point offsets. The tiles are decoded at the entry point offsets to generate a reconstructed image.

Claims (40)

1. A method implemented in a decoder, the method comprising:

receiving, by a receiver of the decoder, a bitstream including a video coding layer (VCL) network abstraction layer (NAL) unit containing a slice of image data divided into a plurality of tiles;

determining, by a processor of the decoder, a number of the tiles in the VCL NAL unit;

determining, by the processor, a number of entry point offsets for the tiles as one less than the number of the tiles in the VCL NAL unit, wherein each entry point offset indicates a starting location of a corresponding tile in the VCL NAL unit, and wherein the number of entry point offsets is not explicitly signaled in the bitstream;

obtaining, by the processor, entry point offsets for the tiles based on the number of entry point offsets; and

decoding, by the processor, the tiles at the entry point offsets to generate a reconstructed image.

2. The method of claim 1 , wherein the entry point offsets for the tiles are obtained from a slice header associated with the slice of image data.

3. The method of claim 1 , wherein the bitstream includes a plurality of VCL NAL units, and wherein each VCL NAL unit contains a single slice of image data divided into an integer number of tiles.

4. The method of claim 1 , wherein the slice of image data is coded as a plurality of coding tree units (CTUs) contained in each of the tiles, and wherein addresses of the CTUs in the VCL NAL unit are assigned based on tile identifiers (IDs) corresponding to the tiles.

5. The method of claim 4 , wherein decoding the tiles includes decoding the CTUs based on addresses of the CTUs in the VCL NAL unit that are explicitly signaled in a slice header.

6. The method of claim 4 , wherein decoding the tiles includes:

determining, by the processor, the addresses of the CTUs in the VCL NAL unit based on a tile ID of a first tile contained in the VCL NAL unit; and

decoding, by the processor, the CTUs based on the addresses of the CTUs.

7. The method of claim 4 , wherein the CTUs do not contain a flag indicating a last CTU in the VCL NAL unit, and wherein the VCL NAL unit contains a padding bit immediately following a last CTU in each tile.

8. The method of claim 1 , further comprising forwarding, by the processor, the reconstructed image toward a display as part of a reconstructed video sequence.

9. A method implemented in an encoder, the method comprising:

partitioning, by a processor of the encoder, an image into at least one slice and partitioning the at least one slice into a plurality of tiles;

encoding, by the processor, the tiles into a bitstream in at least one video coding layer (VCL) network abstraction layer (NAL) unit;

encoding, by the processor, a number of the tiles in the VCL NAL unit in the bitstream;

encoding, by the processor, entry point offsets for the tiles in the bitstream, wherein each entry point offset indicates a starting location of a corresponding tile in the VCL NAL unit, and wherein a number of entry point offsets is not explicitly signaled in the bitstream; and

transmitting, by a transmitter of the encoder, the bitstream without the number of entry point offsets to support decoding the tiles according to an inference that the number of entry point offsets for the tiles is one less than the number of the tiles in the VCL NAL unit.

10. The method of claim 9 , wherein the entry point offsets for the tiles are encoded in a slice header associated with the slice.

11. The method of claim 9 , wherein the bitstream includes a plurality of VCL NAL units, and wherein each VCL NAL unit contains a single slice of image divided into an integer number of tiles.

12. The method of claim 9 , further comprising:

partitioning the tiles into a plurality of coding tree units (CTUs); and

assigning addresses of the CTUs in the VCL NAL unit based on tile identifiers (IDs) corresponding to the tiles.

13. The method of claim 12 , further comprising explicitly signaling, in a slice header, the addresses of the CTUs in the VCL NAL unit.

14. The method of claim 12 , wherein the addresses of the CTUs in the VCL NAL unit are omitted from the bitstream to support a determination of the addresses of the CTUs at a decoder based on a tile ID of a first tile contained in the VCL NAL unit.

15. The method of claim 12 , wherein the CTUs do not contain a flag indicating a last CTU in the VCL NAL unit, and wherein the VCL NAL unit contains a padding bit immediately following a last CTU in each tile.

16. A video coding device comprising:

a receiver configured to receive a bitstream including a video coding layer (VCL) network abstraction layer (NAL) unit containing a slice of image data divided into a plurality of tiles; and

a processor configured to:

determine a number of the tiles in the VCL NAL unit;

determine a number of entry point offsets for the tiles as one less than the number of the tiles in the VCL NAL unit, wherein each entry point offset indicates a starting location of a corresponding tile in the VCL NAL unit, and wherein the number of entry point offsets is not explicitly signaled in the bitstream;

obtain entry point offsets for the tiles based on the number of entry point offsets; and

decode the tiles at the entry point offsets to generate a reconstructed image.

17. The video coding device of claim 16 , wherein the entry point offsets for the tiles are obtained from a slice header associated with the slice of image data.

18. The video coding device of claim 16 , wherein the bitstream includes a plurality of VCL NAL units, and wherein each VCL NAL unit contains a single slice of image data divided into an integer number of tiles.

19. The video coding device of claim 16 , wherein the slice of image data is coded as a plurality of coding tree units (CTUs) contained in each of the tiles, and wherein addresses of the CTUs in the VCL NAL unit are assigned based on tile identifiers (IDs) corresponding to the tiles.

20. The video coding device of claim 19 , wherein decoding the tiles includes decoding the CTUs based on addresses of the CTUs in the VCL NAL unit that are explicitly signaled in a slice header.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 20, 2022
From: FUTUREWEI TECHNOLOGIES, INC.
To: HUAWEI TECHNOLOGIES CO., LTD.
Reel/Frame 058714/0167 →
Continuity (3)
Continuation PCTUS2019051147 · Sep 13, 2019
Provisional Application 62731696 · Sep 14, 2018
Related Publication 20210204000A1 · Jul 1, 2021