IP Library › Granted Patent US 11,288,589
Granted Patent B1
US 11,288,589 · App. 17/149,326 · Granted Mar 29, 2022

Quantum circuit modeling

Inventors: Yehuda Naveh (Tel-Aviv Yafo, IL); Amir Naveh (Haifa, IL); Nir Minerbi (Haifa, IL); Ofek Kirzner (Haifa, IL); Adam Goldfeld (Kiryat Motzkin, IL); Shmuel Ur (Shorashim, IL)
Assignee: CLASSIQ TECHNOLOGIES LTD.
G06N10/00G06F30/337
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Quick Facts
Patent No.
US 11,288,589
App. No.
17/149,326
Granted
Mar 29, 2022
Kind
B1
Abstract

Method, apparatus and product for modeling of quantum circuits and usages thereof. A method includes obtaining a model of a quantum circuit that comprises a set of decision variables, corresponding domains, and constraints, wherein the set of decision variables comprise gate assignment decision variables that define an assignment of a gate to a qubit in a cycle in the quantum circuit. The method includes automatically determining a set of valuations for the set of decision variables. The set of valuations are selected from the corresponding domains and satisfy the constraints. Based on the set of valuations the quantum circuit is synthesized.

Claims (50)

1. A method comprising:

obtaining a model of a quantum circuit, wherein the model of the quantum circuit comprises a set of decision variables, domains of the set of decision variables, and two or more constraints of the set of decision variables, wherein the set of decision variables comprise gate assignment decision variables that define an assignment of a gate to a qubit in a cycle in the quantum circuit, wherein the two or more constraints comprise at least one of:

a constraint relating to entanglement with a phase;

a constraint relating to entanglement without a phase;

a depth of the quantum circuit; and

a circuit error of the quantum circuit;

determining a type of a target quantum computer on which the quantum circuit is to be executed;

automatically adding a hardware-specific constraint to the model, wherein the hardware-specific constraint is a constraint corresponding to the type of the target quantum computer; and

providing the model to be utilized for synthesizing the quantum circuit, wherein the quantum circuit is synthesized based on a set of values for the set of decision variables, wherein the set of values are determined automatically, wherein each value of a decision variable is a selected from a domain in the model that corresponds to the decision variable, wherein the set of values satisfy the two or more constraints of the model and the hardware-specific constraint of the model.

2. The method of claim 1 further comprises: compiling the quantum circuit to obtain a compiled circuit; and executing the compiled circuit on a quantum computer.

3. The method of claim 1 , wherein the set of decision variable comprise a matrix of variables, wherein each column in the matrix represents a respective cycle, wherein each row in the matrix represents a respective qubit, wherein the matrix defines gate assignments in the quantum circuit.

4. The method of claim 1 , wherein the set of decision variables comprise a control qubit decision variable whose value marks to which qubit the gate controls are connected to on a cycle.

5. The method of claim 1 , wherein the two or more constraints comprise a first constraint that is applied on a first block in the quantum circuit and a second constraint that is applied on a second block in the quantum circuit, wherein the first and second blocks comprise disjoint subsets of the set of decision variables.

6. The method of claim 1 , wherein said obtaining the model comprises generating the model based on a target quantum circuit, wherein the quantum circuit is an approximated quantum circuit that is an approximation of the target quantum circuit, wherein the model comprising an error constraint bounding an approximation error by a threshold.

7. The method of claim 6 , wherein the model comprising a depth constraint constraining a depth of the approximated quantum circuit to be smaller than a depth of the target quantum circuit, wherein the quantum circuit synthesized in said synthesizing has a smaller depth than the depth of the target quantum circuit.

8. The method of claim 1 , wherein said automatically determining the set of values for the set of decision variables is performed using a Constraint Satisfaction Problem (CSP) solver, wherein the model is a CSP.

9. A non-transitory computer readable medium retaining program instructions, wherein the program instructions are configured, when read, to cause a processor to perform:

obtaining a model of a quantum circuit, wherein the model of the quantum circuit comprises a set of decision variables, domains of the set of decision variables, and two or more constraints of the set of decision variables, wherein the set of decision variables comprise gate assignment decision variables that define an assignment of a gate to a qubit in a cycle in the quantum circuit, wherein the two or more constraints comprise at least one of:

a constraint relating to entanglement with a phase;

a constraint relating to entanglement without a phase;

a depth of the quantum circuit; and

a circuit error of the quantum circuit;

determining a type of a target quantum computer on which the quantum circuit is to be executed;

automatically adding a hardware-specific constraint to the model, wherein the hardware-specific constraint is a constraint corresponding to the type of the target quantum computer;

automatically determining a set of values for the set of decision variables, wherein the set of values are selected from the domains of the set of decision variables, wherein the set of values satisfy the two or more constraints and the hardware-specific constraint; and

synthesizing the quantum circuit based on the set of values.

10. The non-transitory computer readable medium of claim 9 , wherein the set of decision variables comprise a matrix of variables, wherein each column in the matrix represents a respective cycle, wherein each row in the matrix represents a respective qubit, wherein the matrix defines gate assignments in the quantum circuit.

11. The non-transitory computer readable medium of claim 9 , wherein the set of decision variables comprise a control qubit decision variable whose value marks to which qubit the gate controls are connected to on a cycle.

12. The non-transitory computer readable medium of claim 9 , wherein the two or more constraints comprise a first constraint that is applied on a first block in the quantum circuit and a second constraint that is applied on a second block in the quantum circuit, wherein the first and second blocks comprise disjoint subsets of the set of decision variables.

13. The non-transitory computer readable medium of claim 9 , wherein said obtaining the model comprises generating the model based on a target quantum circuit, wherein the quantum circuit is an approximated quantum circuit that is an approximation of the target quantum circuit, wherein the model comprising an error constraint bounding an approximation error by a threshold.

14. The non-transitory computer readable medium of claim 13 , wherein the model comprising a depth constraint constraining a depth of the approximated quantum circuit to be smaller than a depth of the target quantum circuit, wherein the quantum circuit synthesized in said synthesizing has a smaller depth than the depth of the target quantum circuit.

15. The non-transitory computer readable medium of claim 9 , wherein said automatically determining the set of values for the set of decision variables is performed using a Constraint Satisfaction Problem (CSP) solver, wherein the model is a CSP.

16. An apparatus comprising a processor and a memory, wherein said processor is configured to perform:

obtaining a model of a quantum circuit, wherein the model of the quantum circuit comprises a set of decision variables, domains of the set of decision variables, and two or more constraints of the set of decision variables, wherein the set of decision variables comprise gate assignment decision variables that define an assignment of a gate to a qubit in a cycle in the quantum circuit, wherein the two or more constraints comprise at least one of:

a constraint relating to entanglement with a phase;

a constraint relating to entanglement without a phase;

a depth of the quantum circuit; and

a circuit error of the quantum circuit;

determining a type of a target quantum computer on which the quantum circuit is to be executed;

automatically adding a hardware-specific constraint to the model, wherein the hardware-specific constraint is a constraint corresponding to the type of the target quantum computer;

automatically determining a set of values for the set of decision variables, wherein the set of values are selected from the domains of the set of decision variables, wherein the set of values satisfy the two or more constraints and the hardware-specific constraint; and

synthesizing the quantum circuit based on the set of values.

17. A quantum circuit embodied in a tangible product,

wherein the quantum circuit is synthesized based on a model of the quantum circuit, wherein the model of the quantum circuit comprises a set of decision variables, domains of the set of decision variables, and two or more constraints of the set of decision variables, wherein the set of decision variables comprise gate assignment decision variables that define an assignment of a gate to a qubit in a cycle in the quantum circuit, wherein the two or more constraints comprise at least one of:

a constraint relating to entanglement with a phase;

a constraint relating to entanglement without a phase;

a depth of the quantum circuit; and

a circuit error of the quantum circuit;

wherein the two or more constraints further comprise a hardware-specific constraint, wherein the hardware-specific constraint is a constraint corresponding to a type of the target quantum computer on which the quantum circuit is to be executed, and

wherein the quantum circuit is synthesized based on a set of values for the set of decision variables, wherein the set of values are automatically determined and selected from the domains of the set of decision variables, wherein the set of values satisfy the two or more constraints and the hardware-specific constraint.

Assignments (2)
CORRECTIVE ASSIGNMENT TO CORRECT THE SPELLING OF THE THIRD INVENTOR'S NAME FROM MINERB TO MINERBI PREVIOUSLY RECORDED ON REEL 054924 FRAME 0831. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Feb 1, 2021
From: NAVEH, YEHUDA; NAVEH, AMIR; MINERBI, NIR; KIRZNER, OFEK; GOLDFELD, ADAM; UR, SHMUEL
To: CLASSIQ TECHNOLOGIES LTD.
Reel/Frame 056223/0273 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 14, 2021
From: NAVEH, YEHUDA; NAVEH, AMIR; MINERB, NIR; KIRZNER, OFEK; GOLDFELD, ADAM; UR, SHMUEL
To: CLASSIQ TECHNOLOGIES LTD.
Reel/Frame 054924/0831 →
Cited By (3)
US 12,248,020 US 12,602,607 US 12,731,063