IP Library Granted Patent US 11,329,124
Granted Patent B2
US 11,329,124 · App. 16/907,699 · Granted May 10, 2022

Semiconductor device structure with magnetic element

Inventors: Chin-Yu Ku (Hsinchu, TW); Chi-Cheng Chen (Tainan, TW); Hon-Lin Huang (Hsinchu, TW); Wei-Li Huang (Pingtung County, TW); Chun-Yi Wu (Tainan, TW); Chen-Shien Chen (Zhubei, TW)
Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
H01L28/10
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,329,124
App. No.
16/907,699
Granted
May 10, 2022
Kind
B2
Abstract

A semiconductor device structure is provided. The semiconductor device structure includes a semiconductor substrate and a magnetic element over the semiconductor substrate. The semiconductor device structure also includes an isolation element over the magnetic element. The isolation element partially covers a top surface of the magnetic element. The semiconductor device structure further includes a conductive line over the isolation element. In addition, the semiconductor device structure includes a dielectric layer over the conductive line and the magnetic element.

Claims (39)

1. A semiconductor device structure, comprising:

a semiconductor substrate;

a magnetic element over the semiconductor substrate;

an isolation element over the magnetic element, wherein the isolation element partially covers a top surface of the magnetic element;

a conductive line over the isolation element; and

a dielectric layer over the conductive line and the magnetic element.

2. The semiconductor device structure as claimed in claim 1 , wherein the isolation element extends across the magnetic element.

3. The semiconductor device structure as claimed in claim 1 , wherein the isolation element partially covers sidewall surfaces of the magnetic element.

4. The semiconductor device structure as claimed in claim 1 , wherein the magnetic element comprises multiple sub-layers, and each sub-layers is larger than another sub-layer above it.

5. The semiconductor device structure as claimed in claim 4 , wherein a topmost sub-layer of the sub-layers has a first portion and a second portion, the second portion surrounds the first portion, and the first portion is thicker than the second portion.

6. The semiconductor device structure as claimed in claim 1 , further comprising a protective layer and an etch stop layer between the magnetic element and the semiconductor substrate, wherein the etch stop layer and the protective layer are made of different materials.

7. The semiconductor device structure as claimed in claim 6 , wherein the etch stop layer comprises tantalum oxide, zirconium oxide, tantalum nitride, or a combination thereof.

8. The semiconductor device structure as claimed in claim 1 , wherein the dielectric layer is in direct contact with the isolation element, the conductive line, and the magnetic element.

9. The semiconductor device structure as claimed in claim 1 , further comprising:

a second isolation element extending across the magnetic element, wherein the second isolation element partially covers the top surface of the magnetic element and partially covers sidewall surfaces of the magnetic element; and

a second conductive line over the second isolation element and extends along an extending direction of the second isolation element.

10. The semiconductor device structure as claimed in claim 1 , wherein the isolation element is wider than the conductive line.

11. A semiconductor device structure, comprising:

a semiconductor substrate;

a magnetic element over the semiconductor substrate;

an isolation element extending across the magnetic element, wherein the isolation element partially covers sidewall surfaces of the magnetic element; and

a conductive line over the isolation element.

12. The semiconductor device structure as claimed in claim 11 , wherein the isolation element partially covers a top surface of the magnetic element.

13. The semiconductor device structure as claimed in claim 11 , wherein:

the conductive line has a first edge and a second edge opposite to the first edge,

the isolation element has a third edge and a fourth edge opposite to the third edge,

the first edge is between the second edge and the third edge, and

the second edge is between the first edge and the fourth edge.

14. The semiconductor device structure as claimed in claim 11 , wherein the conductive line extends across the magnetic element.

15. The semiconductor device structure as claimed in claim 11 , wherein the magnetic element comprises multiple sub-layers, each sub-layers is larger than another sub-layer above it, a topmost sub-layer of the sub-layers has a first portion and a second portion, the second portion surrounds the first portion, and the first portion is thicker than the second portion.

16. A semiconductor device structure, comprising:

a semiconductor substrate;

a magnetic stack over the semiconductor substrate;

an isolation element extending along a top surface and sidewalls of the magnetic stack, wherein the isolation element partially covers the magnetic stack; and

a conductive line over the isolation element.

17. The semiconductor device structure as claimed in claim 16 , further comprising a dielectric layer over the conductive line, wherein the dielectric layer is in direct contact with the isolation element and the magnetic stack.

18. The semiconductor device structure as claimed in claim 16 , wherein the magnetic stack comprises cobalt, zirconium, tantalum, iron, nickel, or a combination thereof.

19. The semiconductor device structure as claimed in claim 18 , further comprising an etch stop layer between the semiconductor substrate and the magnetic stack, wherein the etch stop layer comprises tantalum oxide, zirconium oxide, tantalum nitride, or a combination thereof.

20. The semiconductor device structure as claimed in claim 16 , wherein the isolation element has a first edge, the conductive line has a second edge, and the first edge and the second edge are substantially parallel to each other.

Continuity (3)
Continuation 16260439 · Jan 29, 2019
Provisional Application 62691108 · Jun 28, 2018
Related Publication 20200321431A1 · Oct 8, 2020