IP Library › Granted Patent US 11,361,174
Granted Patent B1
US 11,361,174 · App. 16/871,101 · Granted Jun 14, 2022

Enhanced RFID tag authentication

Inventors: Matthew Robshaw (Seattle, WA); Christopher J. Diorio (Shoreline, WA)
Assignee: Impinj, Inc.
G06K7/10366G06K7/10198H04L9/3247H04L9/3271H04L2209/805
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Quick Facts
Patent No.
US 11,361,174
App. No.
16/871,101
Filed
May 11, 2020
Granted
Jun 14, 2022
Kind
B1
Art Unit
2684
USPC
340/5.8
Abstract

An authentication method includes RFID tags authenticating RFID readers. A tag sends a tag identifier and a reader challenge to a reader in response to one or more commands from the reader. The reader then either derives a response to the reader challenge itself or has a verification authority derive the response. The response may be derived from parameter(s) in the reader challenge, and may be derived using a cryptographic key. The reader then sends the response to the tag along with one or more commands. The tag verifies the response before executing action(s) associated with the command(s).

Claims (97)

1. A Radio Frequency Identification (RFID) system configured to cause an RFID integrated circuit (IC) having a first parameter to execute an action, the system comprising:

a transceiver configured to communicate with RFID ICs; and

a processor block configured to:

cause the transceiver to send a first command to the RFID IC;

receive, via the transceiver and from the RFID IC, at least an identifier and an encrypted version of the first parameter;

cause a key to be determined using the received identifier;

cause the first parameter to be recovered from the encrypted version using the key; and

cause the transceiver to send to the IC a single second command including at least a first portion of the first parameter, wherein the second command at least partly causes the RFID IC to execute an action defined by at least the second command upon verifying at least the first portion of the first parameter.

2. The RFID system of claim 1 , wherein the processor block is further configured to cause the transceiver to send to the IC a single third command including at least a second portion of the first parameter, wherein:

the first and second portions are different;

the action is defined by at least the second and third commands; and

the second command at least partly causes the IC to execute the action upon verifying at least the first and second portions.

3. The RFID system of claim 1 , wherein the action is defined by at least the second and third commands, excluding the first parameter.

4. The RFID system of claim 1 , wherein the processor block is configured to determine the key and recover the first parameter by:

causing the encrypted version of the first parameter to be sent to a verification authority; and

receiving the first portion of the first parameter from the verification authority, wherein the verification authority determines the key and recovers the first parameter from the encrypted version.

5. The RFID system of claim 1 , wherein the processor block is further configured to:

cause the transceiver to send a random number to the RFID IC with the first command;

receive, via the transceiver and from the RFID IC, a cryptographic function of the random number;

verify an authenticity of the RFID IC using the cryptographic function; and

cause the transceiver to send the single second command to the IC only if the authenticity of the IC is verified.

6. The RFID system of claim 1 , wherein the action includes at least one of:

reading from an IC memory;

writing to an IC memory;

adjusting an IC counter value;

adjusting a pointer to a memory location;

adjusting a value of a key; and

changing an IC state.

7. The RFID system of claim 1 , wherein the second command and at least one of a third command and a trigger event cause the RFID IC to execute the action.

8. A Radio Frequency Identification (RFID) system configured to cause an RFID integrated circuit (IC) having a first parameter to execute an action, the system comprising:

a transceiver configured to communicate with RFID ICs; and

a processor block configured to:

cause the transceiver to send a first command to the RFID IC;

receive, via the transceiver and from the RFID IC, at least an identifier and an encrypted version of the first parameter;

determine a key using the received identifier;

recover the first parameter from the encrypted version using the key;

derive a second parameter from the first parameter using a deriving operation that includes one of:

setting the second parameter equal to the first parameter,

incorporating the first parameter into a string, and

computing an arithmetic function of at least the first parameter; and

cause the transceiver to send to the IC a single second command including at least a first portion of the second parameter, wherein:

the second command at least partly causes the IC to, upon verifying at least the first portion of the second parameter using the deriving operation and the first parameter, execute an action defined by at least the second command; and

the first parameter and the second parameter do not define the action.

9. The RFID system of claim 8 , wherein the processor block is further configured to cause the transceiver to send to the IC a single third command including at least a second portion of the second parameter, wherein:

the first and second portions are different;

the action is defined by at least the second and third commands; and

at least the second command causes the IC to execute the action upon verifying at least the first and second portions.

10. The RFID system of claim 8 , wherein the processor is configured to cause the key to be determined and cause the first parameter to be recovered by:

causing the encrypted version of the first parameter to be sent to a verification authority; and

receiving the derived second parameter from the verification authority, wherein the verification authority determines the key, recovers the first parameter from the encrypted version, and derives the second parameter form the first parameter.

11. The RFID system of claim 8 , wherein the processor block is further configured to:

cause the transceiver to send a random number to the RFID IC with the first command;

receive, via the transceiver and from the RFID IC, a cryptographic function of the random number;

cause an authenticity of the RFID IC to be verified using the cryptographic function; and

cause the transceiver to send to the IC the single second command only if the authenticity of the RFID IC is verified.

12. The RFID system of claim 11 , wherein the processor block is configured to cause the authenticity of the RFID IC to be verified by:

causing the cryptographic function to be sent to a verification authority; and

receiving an indication of tag authenticity from the verification authority.

13. The RFID system of claim 8 , wherein the action includes at least one of:

reading from an IC memory;

writing to an IC memory;

adjusting an IC counter value;

adjusting a pointer to a memory location;

adjusting a value of a key; and

causing the IC to change state.

14. The RFID system of claim 8 , wherein the second command and at least one of a third command and a trigger event cause the RFID IC to execute the action.

15. A Radio Frequency Identification (RFID) system configured to cause an RFID integrated circuit (IC) having a first parameter to execute an action, the system comprising:

a transceiver configured to communicate with RFID ICs; and

a processor block configured to:

cause the transceiver to send a first command to the RFID IC;

receive, via the transceiver and from the RFID IC, at least an identifier and an encrypted version of the first parameter;

determine a key using the received identifier;

recover the first parameter from the encrypted version using the key;

derive a second parameter from the first parameter; and

cause the transceiver to send to the IC a single second command including at least a portion of the second parameter and defining at least part of an IC action, wherein:

at least the second command causes the IC to, upon verifying at least the first portion of the second parameter using the first parameter, execute the IC action; and

the first parameter and the second parameter do not define the IC action.

16. The RFID system of claim 15 , wherein the processor block is further configured to cause the transceiver to send to the IC a single third command including at least a second portion of the first parameter, wherein:

the first and second portions are different,

the IC action is defined by at least the second and third commands, and

the second command at least partly causes the IC to execute the IC action upon verifying at least the first and second portions.

17. The RFID system of claim 15 , wherein the processor block is configured to determine the key, recover the first parameter, and derive the second parameter by:

sending the encrypted version of the first parameter to a verification authority, and

receive the derived second parameter from the verification authority, wherein the verification authority determines the key, recovers the first parameter from the encrypted version, and derives the second parameter from the first parameter.

18. The RFID system of claim 15 , wherein the processor block is further configured to:

cause the transceiver to send a random number to the RFID IC with the first command;

receive, via the transceiver and from the RFID IC, a cryptographic function of the random number;

verify an authenticity of the RFID IC using the cryptographic function; and

cause the transceiver to send the single second command to the RFID IC only if the authenticity of the RFID IC is verified.

19. The RFID system of claim 15 , wherein the IC action includes at least one of:

reading from an IC memory;

writing to an IC memory;

adjusting an IC counter value;

adjusting a pointer to a memory location;

adjusting a value of a key; and

changing an IC state.

20. The RFID system of claim 15 , wherein the second command and at least one of a third command and a trigger event cause the RFID IC to execute the IC action.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 11, 2020
From: ROBSHAW, MATTHEW; DIORIO, CHRISTOPHER J.
To: IMPINJ, INC.
Reel/Frame 052620/0397 →
Continuity (15)
Continuation 16180140 · Nov 5, 2018
Continuation 15911730 · Mar 5, 2018
Continuation In Part 15680639 · Aug 18, 2017
Continuation 14602173 · Jan 21, 2015
Continuation In Part 14207525 · Mar 12, 2014
Continuation In Part 14106522 · Dec 13, 2013
Continuation In Part 13308123 · Nov 30, 2011
Continuation In Part 14030854 · Sep 18, 2013
Continuation In Part 13349297 · Jan 12, 2012
Provisional Application 61737376 · Dec 14, 2012
Provisional Application 61438613 · Feb 1, 2011
Provisional Application 61783403 · Mar 14, 2013
Provisional Application 61748719 · Jan 3, 2013
Provisional Application 61485018 · May 11, 2011
Provisional Application 61433518 · Jan 17, 2011
Cited By (6)
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