Display device
A display device includes pixels. Each of the pixels includes: a first transistor including a gate electrode connected to a first node, a first electrode connected to a second node, and a second electrode connected to a third node; a second transistor including a gate electrode connected to a first scan line, a first electrode connected to a data line, and a second electrode connected to the second node; a first sub-transistor including a gate electrode connected to the first scan line, a first electrode connected to the first node, and a second electrode connected to a fourth node; and a second sub-transistor including a gate electrode connected to the first scan line, a first electrode connected to the fourth node, and a second electrode connected to the third node. A channel width of the second sub-transistor is wider than a channel width of the first sub-transistor.
1. A display device comprising:
pixels,
wherein each of the pixels comprises:
a first transistor comprising a gate electrode of the first transistor connected to a first node, a first electrode of the first transistor connected to a second node, and a second electrode of the first transistor connected to a third node;
a second transistor comprising a gate electrode of the second transistor connected to a first scan line, a first electrode of the second transistor connected to a data line, and a second electrode of the second transistor connected to the second node;
a first sub-transistor comprising a gate electrode of the first sub-transistor connected to the first scan line, a first electrode of the first sub-transistor connected to the first node, and a second electrode of the first sub-transistor connected to a fourth node; and
a second sub-transistor comprising a gate electrode of the second sub-transistor connected to the first scan line, a first electrode of the second sub-transistor connected to the fourth node, and a second electrode of the second sub-transistor connected to the third node, and
wherein a channel width of the second sub-transistor is wider than a channel width of the first sub-transistor.
2. The display device of claim 1 , wherein the channel width of the first sub-transistor is narrower than a first electrode region width or a second electrode region width of the first sub-transistor.
3. The display device of claim 2 , wherein a channel of the first sub-transistor comprises a concave portion.
4. The display device of claim 1 , wherein the channel width of the second sub-transistor is wider than a first electrode region width or a second electrode region width of the second sub-transistor.
5. The display device of claim 4 , wherein a channel of the second sub-transistor comprises a convex portion.
6. The display device of claim 1 , wherein a channel length of the second sub-transistor is equal to or shorter than a channel length of the first sub-transistor.
7. The display device of claim 1 , wherein each of the pixels further comprises:
a third sub-transistor comprising a gate electrode of the third sub-transistor connected to a second scan line, a first electrode of the third sub-transistor connected to the first node, and a second electrode of the third sub-transistor connected to a fifth node; and
a fourth sub-transistor comprising a gate electrode of the fourth sub-transistor connected to the second scan line, a first electrode of the fourth sub-transistor connected to the fifth node, and a second electrode of the fourth sub-transistor connected to an initialization line, and
wherein a channel width of a third sub-transistor is wider than the channel width of the first sub-transistor.
8. The display device of claim 7 , wherein the channel width of the third sub-transistor is wider than at least one of a first electrode region width and a second electrode region width of the third sub-transistor.
9. The display device of claim 8 , wherein a channel of the third sub-transistor comprises a convex portion.
10. The display device of claim 1 , wherein each of the pixels further comprises:
a third sub-transistor comprising a gate electrode of the third sub-transistor connected to a second scan line, a first electrode of the third sub-transistor connected to the first node, and a second electrode of the third sub-transistor connected to a fifth node; and
a fourth sub-transistor comprising a gate electrode of the fourth sub-transistor connected to the second scan line, a first electrode of the fourth sub-transistor connected to the fifth node, and a second electrode of the fourth sub-transistor connected to an initialization line, and
wherein a channel width of the fourth sub-transistor is wider than the channel width of the first sub-transistor.
11. The display device of claim 10 , wherein the channel width of the fourth sub-transistor is wider than a first electrode region width or a second electrode region width of the fourth sub-transistor.
12. The display device of claim 11 , wherein a channel of the fourth sub-transistor comprises a convex portion.
13. The display device of claim 1 , wherein each of the pixels further comprises a fourth transistor comprising a gate electrode of the fourth transistor connected to a second scan line, a first electrode of the fourth transistor connected to the first node, and a second electrode of the fourth transistor connected to an initialization line, and
wherein a channel width of the fourth transistor is wider than the channel width of the first sub-transistor.
14. A display device comprising:
pixels,
wherein each of the pixels comprises:
a first transistor comprising a gate electrode of the first transistor connected to a first node, a first electrode of the first transistor connected to a second node, and a second electrode of the first transistor connected to a third node;
a second transistor comprising a gate electrode of the second transistor connected to a first scan line, a first electrode of the second transistor connected to a data line, and a second electrode of the second transistor connected to the second node;
a first sub-transistor comprising a gate electrode of the first sub-transistor connected to the first scan line, a first electrode of the first sub-transistor connected to the first node, and a second electrode of the first sub-transistor connected to a fourth node; and
a second sub-transistor comprising a gate electrode of the second sub-transistor connected to the first scan line, a first electrode of the second sub-transistor connected to the fourth node, and a second electrode of the second sub-transistor connected to the third node, and
wherein a channel width of the first sub-transistor is wider than a channel width of the second sub-transistor.
15. The display device of claim 14 , wherein the channel width of the first sub-transistor is wider than a first electrode region width or a second electrode region width of the first sub-transistor.
16. The display device of claim 15 , wherein a channel of the first sub-transistor comprises a convex portion.