IP Library Granted Patent US 11,368,249
Granted Patent B2
US 11,368,249 · App. 17/132,566 · Granted Jun 21, 2022

Polar coding method, apparatus, and device

Inventors: Rong Li (Hangzhou, CN); Gongzheng Zhang (Hangzhou, CN); Ying Chen (Hangzhou, CN); Xiaocheng Liu (Hangzhou, CN); Jun Wang (Hangzhou, CN)
Assignee: Huawei Technologies Co., Ltd.
H04L1/0058H03M13/13H03M13/618H03M13/635H03M13/6588H04L1/00
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Quick Facts
Patent No.
US 11,368,249
App. No.
17/132,566
Granted
Jun 21, 2022
Kind
B2
Abstract

Embodiments of this application disclose a polar coding method, apparatus, and device, so as to reduce storage overheads of a system. A sequence for polar coding is obtained based on a length M of a target polar code, wherein the sequence comprises L sequence numbers, ordering of the L sequence numbers in the sequence is the same as ordering of the L sequence numbers in a maximum mother code sequence, wherein the maximum mother code sequence is obtained by sorting N sequence numbers of N polarized channels in ascending order or descending order of reliability metrics, wherein L and N are integer power of 2, M is smaller than or equal to L, L is smaller than or equal to N.

Claims (40)

1. A method, comprising:

identifying, by a communications apparatus, a plurality of bits to be coded;

determining, by the communications apparatus, a mother code sequence for coding the plurality of bits into a target polar code, the mother code sequence comprising at least a sub-sequence of a maximum mother code sequence, wherein the maximum mother code sequence comprising N sequence numbers corresponding to N polarized channels and the N sequence numbers are sorted according to arranging reliabilities of N polarized channels in an ascending order or a descending order, the mother code sequence comprising L sequence numbers that are sorted in a same order as they are in the maximum mother code sequence, wherein L≤N, and L and N are an integer power of 2; and

performing, by the communications apparatus, polar coding on the plurality of bits based on the mother code sequence to generate a coded sequence.

2. The method according claim 1 , wherein values of the mother code sequence are less than L.

3. The method according claim 1 , wherein determining the mother code sequence comprises:

determining sequence numbers in the maximum mother code sequence that are less than L.

4. The method according claim 1 , wherein the maximum mother code sequence is pre-stored in a memory.

5. The method according to claim 1 , wherein N equals 1024.

6. A device, comprising:

a memory storing instructions;

at least one processor coupled to the memory for executing the instructions to perform operations comprising:

obtaining to-be-coded bits;

obtaining a second sequence as a mother code sequence for coding the to-be-encoded bits into a target polar code, the second sequence comprising a sub-sequence of a maximum mother code sequence or comprising the maximum mother code sequence, the maximum mother code sequence comprising N sequence numbers of N polarized channels and the N sequence numbers are sorted in ascending order or descending order of reliability metrics of the N polarized channels, the second sequence comprising L sequence numbers, with an ordering of the L sequence numbers in the second sequence being the same as an ordering of the L sequence numbers in the maximum mother code sequence, wherein L and N are an integer power of 2;

performing polar coding on the to-be-coded bits based on the second sequence;

outputting a sequence resulting from the polar coding.

7. The device according claim 6 , wherein values of the L sequence numbers in the second sequence are less than L.

8. The device according claim 6 , wherein the obtaining the second sequence comprises:

obtaining the second sequence by reading, from the maximum mother code sequence, sequence numbers that are less than L.

9. The device according claim 6 , wherein the maximum mother code sequence is pre-stored.

10. The device according claim 6 , wherein N equals 1024.

11. An apparatus comprising an integrated circuit, wherein the integrated circuit comprises:

an input interface circuit, configured to obtain to-be-coded bits;

a logic circuit, configured to:

obtain a second sequence as a mother code sequence for coding the to-be-encoded bits into a target polar code, the second sequence comprising a sub-sequence of a maximum mother code sequence or comprising the maximum mother code sequence, the maximum mother code sequence comprising N sequence numbers of N polarized channels and the N sequence numbers are sorted in ascending order or descending order of reliability metrics of the N polarized channels, the second sequence comprising L sequence numbers, with an ordering of the L sequence numbers in the second sequence being the same as an ordering of the L sequence numbers in the maximum mother code sequence, wherein L and N are an integer power of 2; and

perform polar coding on the to-be-coded bits based on the second sequence;

an output interface circuit, configured to output a sequence resulting from the polar coding.

12. The apparatus according claim 11 , wherein values of the L sequence numbers in the second sequence are less than L.

13. The apparatus according claim 11 , wherein the second sequence is obtained by reading, from the maximum mother code sequence, sequence numbers that are less than L, wherein L is a length of a mother code for the target polar code.

14. The apparatus according claim 11 , wherein the maximum mother code sequence is pre-stored.

15. The apparatus according claim 11 , wherein N equals 1024.

16. A non-transitory, computer-readable medium storing one or more instructions executable by at least one processor to perform operations comprising:

obtain to-be-coded bits;

obtain a second sequence as a mother code sequence for coding the to-be-encoded bits into a target polar code, the second sequence comprising a sub-sequence of a maximum mother code sequence or comprising the maximum mother code sequence, the maximum mother code sequence comprising N sequence numbers of N polarized channels and the N sequence numbers are sorted in ascending order or descending order of reliability metrics of the N polarized channels, the second sequence comprising L sequence numbers, with an ordering of the L sequence numbers in the second sequence being the same as an ordering of the L sequence numbers in the maximum mother code sequence, wherein L and N are an integer power of 2;

perform polar coding on the to-be-coded bits based on the second sequence; and

output a sequence resulting from the polar coding.

17. The computer readable medium according claim 16 , wherein values of the L sequence numbers in the second sequence are less than L.

18. The computer readable medium according claim 16 , wherein the second sequence is obtained by reading, from the maximum mother code sequence, sequence numbers that are less than L.

19. The computer readable medium according claim 16 , wherein the maximum mother code sequence is pre-stored.

20. The computer readable medium according to claim 16 , wherein N equals 1024.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 4, 2022
From: LI, RONG; ZHANG, GONGZHENG; CHEN, YING; LIU, XIAOCHENG; WANG, JUN
To: HUAWEI TECHNOLOGIES CO., LTD.
Reel/Frame 059177/0623 →
Priority Claims (1)
CN 201610664987.6 · Aug 11, 2016 · national
Continuity (4)
Continuation 16295151 · Mar 7, 2019
Continuation 16110873 · Aug 23, 2018
Continuation PCTCN2017091675 · Jul 4, 2017
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