IP Library Granted Patent US 11,404,337
Granted Patent B2
US 11,404,337 · App. 16/729,094 · Granted Aug 2, 2022

Scalable extreme large size substrate integration

Inventors: Kunzhong Hu (Cupertino, CA); Chonghua Zhong (Cupertino, CA); Jiongxin Lu (Cupertino, CA); Jun Zhai (Cupertino, CA)
Assignee: Apple Inc.
H01L23/145H01L21/565H01L23/28H01L23/488H01L24/14H01L24/94H01L25/0655H01L2021/60022
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Quick Facts
Patent No.
US 11,404,337
App. No.
16/729,094
Granted
Aug 2, 2022
Kind
B2
Abstract

Electronic packages and methods of formation are described in which an interposer is solderlessly connected with a package substrate. The interposer may be stacked on the package substrate and joined with a conductive film, and may be formed on the package substrate during a reconstitution sequence.

Claims (26)

1. An electronic package comprising:

a package substrate;

an organic interposer is bonded to the package substrate within an opening in a solder mask layer formed on top of a build-up structure of the package substrate, wherein a bottom side of the organic interposer is bonded to the package substrate with a conductive film to electrically connect a plurality of contact pads of the organic interposer to a corresponding plurality of landing pads of the package substrate; and

one or more dies bonded to a top side of the organic interposer;

wherein the conductive film comprises an array of pins or is an anisotropic conductive film.

2. The electronic package of claim 1 , wherein the organic interposer comprises a plurality of metal redistribution lines and a plurality of polymer dielectric layers.

3. The electronic package of claim 1 , wherein the conductive film comprises the array of pins.

4. The electronic package of claim 3 , wherein the pins in the array of pins are separated by a pin pitch of less than 100 microns, wherein the pin pitch is less than a minimum contact pad pitch of the plurality of contact pads of the interposer.

5. The electronic package of claim 1 , wherein the conductive film is the anisotropic conductive film.

6. The electronic package of claim 1 , wherein the package substrate is laterally surrounded by a molding compound layer.

7. The electronic package of claim 1 , further comprising a plurality of solder bumps on a bottom side of the package substrate, wherein the package substrate comprises a cored substrate.

8. An electronic package comprising:

a package substrate;

a thin film organic interposer bonded to the package substrate with a conductive film spanning between the laterally opposite edges of the thin film organic interposer to electrically connect the plurality of bottom side contact pads of the thin film organic interposer to a corresponding plurality of landing pads of the package substrate;

wherein the package substrate is wider than the conductive film and the thin film organic interposer; and

one or more dies bonded to the plurality of top side landing pads on a top side of the thin film organic interposer;

wherein the conductive film comprises an array of pins or is an anisotropic conductive film.

9. The electronic package of claim 8 , wherein the thin film organic interposer is comprised primary of a plurality of metal redistribution lines, a plurality of dielectric layers, vias, a plurality of top side landing pads, and a plurality of bottom side contact pads.

10. The electronic package of claim 9 , wherein the plurality of dielectric layers comprises a plurality of polymer dielectric layers.

11. The electronic package of claim 10 , wherein the plurality of dielectric layers comprises a lower rigid layer.

12. The electronic package of claim 8 , wherein the thin film organic interposer comprise a plurality of metal redistribution lines and plurality of laminate polymer dielectric layers.

13. The electronic package of claim 8 , wherein the conductive film comprises the array of pins.

14. The electronic package of claim 13 , wherein the pins in the array of pins are separated by a pin pitch of less than 100 microns, wherein the pin pitch is less than a minimum contact pad pitch of the plurality of contact pads of the interposer.

15. The electronic package of claim 8 , wherein the conductive film is the anisotropic conductive film.

16. The electronic package of claim 8 , wherein the package substrate is laterally surrounded by a molding compound layer.

17. The electronic package of claim 8 , further comprising a plurality of solder bumps on a bottom side of the package substrate, wherein the package substrate comprises a cored substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 27, 2019
From: HU, KUNZHONG; ZHONG, CHONGHUA; LU, JIONGXIN; ZHAI, JUN
To: APPLE INC.
Reel/Frame 051380/0424 →
Continuity (1)
Related Publication 20210202332A1 · Jul 1, 2021