Symmetric read operation resistive random-access memory cell with bipolar junction selector
A memory device, and a method of making the same, includes a resistive random-access memory element electrically connected to an extrinsic base region of a bipolar junction transistor, the extrinsic base region of the bipolar junction transistor consisting of an epitaxially grown material that forms the bottom electrode of the resistive random-access memory element. Additionally, a method of writing to the memory device includes applying a first voltage on a word line of the memory device to form a filament in the resistive random-access memory element. A second voltage including an opposite polarity to the first voltage can be applied to the word line to remove a portion of the filament in the resistive random-access memory element.
1. A memory device comprising:
a resistive random-access memory element electrically connected to an extrinsic base region of a bipolar junction transistor, the extrinsic base region of the bipolar junction transistor being a bottom electrode of the resistive random-access memory element;
an intrinsic base region located between an emitter region and a collector region of the bipolar junction transistor, the extrinsic base region located above the intrinsic base region;
an extrinsic base layer located above the intrinsic base region; and
an epitaxially grown material above the extrinsic base layer, the epitaxially grown material including a facetted epitaxy layer having a triangular shape with an upwardly-pointed tip.
2. The memory device of claim 1 , wherein the epitaxially grown material is the bottom electrode of the resistive random-access memory element.
3. The memory device of claim 1 , wherein the extrinsic base layer and the epitaxially grown material above the extrinsic base layer comprise an epitaxially grown single-crystalline semiconductor material with a high doping profile.
4. The memory device of claim 3 , wherein the epitaxially grown material has a higher dopant concentration than the extrinsic base layer.
5. The memory device of claim 3 , wherein the high doping profile further comprises a stepped doping profile.
6. The memory device of claim 3 wherein the high doping profile further comprises a graded doping profile.
7. The memory device of claim 1 , wherein the resistive random memory stack comprises:
the bottom electrode formed by the extrinsic base region of the bipolar junction transistor:
a switching layer directly above the extrinsic base region;
a top electrode layer above the switching layer; and
a metal fill above the top electrode layer.
8. A method of writing to a memory structure comprising:
applying a first voltage on a word line of the memory structure, the memory structure comprising a resistive random-access memory element electrically connected to an extrinsic base of a bipolar junction transistor; and
forming a filament in the resistive random-access memory element, as a result of applying the first voltage.
9. The method of claim 8 , further comprising:
applying a second voltage on the word line, wherein the second voltage is an opposite polarity to the first voltage, and wherein the second voltage removes a portion of the filament in the resistive random-access memory element.
10. The method of claim 9 , further comprising:
applying a third voltage between the word line and at least one of a bit line and a select line, wherein applying the third voltage activates a read operation in the resistive random-access memory element.
11. The method of claim 8 , wherein the extrinsic base of the bipolar junction transistor comprises a triangle-shaped top region that forms a bottom electrode of the resistive random-access memory element.
12. A method of forming a memory structure, comprising:
forming a resistive random-access memory element electrically connected to an extrinsic base region of a bipolar junction transistor, the extrinsic base region of the bipolar junction transistor being a bottom electrode of the resistive random-access memory element;
forming an intrinsic base region between an emitter region and a collector region of the bipolar junction transistor, the extrinsic base region located above the intrinsic base region;
forming an extrinsic base layer above the intrinsic base region; and
forming an epitaxially grown material above the extrinsic base layer, the epitaxially grown material including a facetted epitaxy layer having a triangular shape with an upwardly-pointed tip.
13. The method of claim 12 , wherein the epitaxially grown material is the bottom electrode of the resistive random-access memory element.
14. The method of claim 12 , wherein the extrinsic base layer and the epitaxially grown material above the extrinsic base layer comprise an epitaxially grown single-crystalline semiconductor material with a high doping profile.
15. The method of claim 12 , wherein the epitaxially grown material has a higher dopant concentration than the extrinsic base layer.