IP Library › Granted Patent US 11,437,955
Granted Patent B1
US 11,437,955 · App. 17/510,032 · Granted Sep 6, 2022

Switchover schemes for transition of oscillator from internal-resistor to external-resistor mode

Inventors: Nitin Agarwal (Bangalore, IN); Aniruddha Roy (Bangalore, IN); Preetham Narayana Reddy (Bangalore, IN)
Assignee: TEXAS INSTRUMENTS INCORPORATED
H03B5/06H03B5/1212H03B5/36H03L5/00
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Quick Facts
Patent No.
US 11,437,955
App. No.
17/510,032
Granted
Sep 6, 2022
Kind
B1
Abstract

In an example, a system includes an oscillator circuit on a chip. The oscillator circuit includes a charging current generator including a current mirror and an amplifier, where the amplifier is coupled to a pin of the chip. The oscillator circuit also includes a first switch coupled to the pin, a second switch coupled to the pin and to a charging resistor, and a third switch coupled to the amplifier and an internal resistor, where the internal resistor is internal to the chip. The oscillator circuit includes a bias current source coupled to the current mirror. The system includes an external resistor coupled to the pin, where the external resistor is external to the chip. The system also includes an external capacitor coupled to the pin and coupled in parallel to the external resistor, where the external capacitor is external to the chip.

Claims (40)

1. A system, comprising:

an oscillator circuit on a chip, wherein the oscillator circuit includes:

a charging current generator including a current mirror and an amplifier, wherein the amplifier is coupled to a pin on the chip, and wherein the pin is adapted to be coupled to circuitry external to the chip;

a first switch coupled to the pin, a second switch coupled to the pin and to a charging resistor, and a third switch coupled to the amplifier and an internal resistor, wherein the internal resistor is internal to the chip; and

a bias current source coupled to the current mirror.

2. The system of claim 1 , further comprising:

a fourth switch configured to disconnect the current mirror from the amplifier.

3. The system of claim 1 , further comprising:

a fifth switch and a sixth switch coupled to a first input of the amplifier, wherein the fifth switch is configured to provide a first voltage to the first input during an internal-resistor mode, and wherein the sixth switch is configured to provide a second voltage to the first input during an external-resistor mode.

4. The system of claim 1 , wherein the bias current source is configured to provide a current for the oscillator circuit.

5. The system of claim 1 , wherein an output of the amplifier is coupled to a gate of a transistor, and wherein an input of the amplifier is coupled to a source of the transistor.

6. The system of claim 1 , wherein the third switch couples the internal resistor to the amplifier during an internal-resistor mode.

7. The system of claim 1 , wherein the first switch couples the amplifier to circuitry external to the chip during an external-resistor mode.

8. The system of claim 1 , wherein the charging resistor is configured to provide a charging voltage to the pin.

9. A system, comprising:

an oscillator circuit on a chip, wherein the oscillator circuit includes:

a charging current generator including a current mirror and an amplifier, wherein the amplifier is coupled to a pin of the chip;

a first switch coupled to the pin, a second switch coupled to the pin and to a charging resistor, and a third switch coupled to the amplifier and an internal resistor, wherein the internal resistor is internal to the chip; and

a bias current source coupled to the current mirror;

an external resistor coupled to the pin, wherein the external resistor is external to the chip; and

an external capacitor coupled to the pin and coupled in parallel to the external resistor, wherein the external capacitor is external to the chip.

10. The system of claim 9 , further comprising:

a fourth switch configured to disconnect the current mirror from the amplifier.

11. The system of claim 9 , wherein the first switch is configured to couple the amplifier to the external resistor during an external-resistor mode.

12. The system of claim 9 , wherein the third switch is configured to couple the internal resistor to the amplifier during an internal-resistor mode.

13. A method, comprising:

charging an external capacitor coupled to a pin on an oscillator chip, wherein the external capacitor is external to the chip;

providing a bias current to a current mirror with a bias current source;

disconnecting an internal resistor of the oscillator chip and connecting an external resistor to the oscillator chip, wherein the internal resistor is internal to the chip, and wherein the external resistor is external to the chip and coupled to the pin;

responsive to connecting the external resistor, charging the external capacitor to a predetermined value; and

responsive to charging the external capacitor to the predetermined value, disconnecting the bias current source from the current mirror.

14. The method of claim 13 , further comprising:

activating a switch to charge the external capacitor coupled to the pin.

15. The method of claim 13 , wherein the external capacitor and the external resistor are coupled in parallel.

16. The method of claim 13 , further comprising:

responsive to charging the external capacitor to the predetermined value, connecting an amplifier to the current mirror.

17. The method of claim 16 , wherein the amplifier and the external resistor are configured to provide a current to the current mirror.

18. The method of claim 13 , wherein the current mirror is configured to provide a current to oscillator circuitry.

19. The method of claim 13 , further comprising a push-pull amplifier charging the external capacitor to the predetermined value.

20. The method of claim 13 , wherein disconnecting the internal resistor comprises switching an oscillator from an internal-resistor mode to an external-resistor mode.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 28, 2021
From: AGARWAL, NITIN; ROY, ANIRUDDHA; NARAYANA REDDY, PREETHAM
To: TEXAS INSTRUMENTS INCORPORATED
Reel/Frame 057943/0350 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 25, 2021
From: AGARWAL, NITIN; ROY, ANIRUDDHA; NARAYANA REDDY, PREETHAM
To: TEXAS INSTRUMENTS INCORPORATED
Reel/Frame 057904/0293 →
Priority Claims (1)
IN 202141035219 · Aug 5, 2021 · national
Cited By (1)
US 12,334,869