IP Library Granted Patent US 11,450,607
Granted Patent B2
US 11,450,607 · App. 16/892,649 · Granted Sep 20, 2022

Semiconductor device and method of fabricating the same

Inventors: Seung Yong Yoo (Incheon, KR); Jong Jin Lee (Seoul, KE); Rak Hwan Kim (Suwon-si, KR); Eun-Ji Jung (Hwaseong-si, KR); Won Hyuk Hong (Seoul, KR)
Assignee: SAMSUNG ELECTRONICS CO., LTD.
H01L23/5283H01L21/28568H01L21/7685H01L21/76877H01L23/5226H01L23/53209H01L23/53238H01L23/53257
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Quick Facts
Patent No.
US 11,450,607
App. No.
16/892,649
Granted
Sep 20, 2022
Kind
B2
Abstract

A semiconductor device includes a first interlayer insulating film disposed on a substrate and having a first trench. A first lower conductive pattern fills the first trench and includes first and second valley areas that are spaced apart from each other in a first direction parallel to an upper surface of the substrate. The first and second valley areas are recessed toward the substrate. A second interlayer insulating film is disposed on the first interlayer insulating film and includes a second trench that exposes at least a portion of the first lower conductive pattern. An upper conductive pattern fills the second trench and includes an upper barrier film and an upper filling film disposed on the upper barrier film. The upper conductive pattern at least partially fills the first valley area.

Claims (60)

1. A semiconductor device comprising:

a first interlayer insulating film disposed on a substrate and including a first trench;

a first lower conductive pattern filling the first trench and including first and second valley areas that are spaced apart from each other in a first direction parallel to an upper surface of the substrate, the first and second valley areas are recessed toward the substrate;

a second interlayer insulating film disposed on the first interlayer insulating film and including a second trench that exposes at least a portion of the first lower conductive pattern; and

an upper conductive pattern filling the second trench and including an upper barrier film and an upper filling film disposed on the upper barrier film,

wherein the upper conductive pattern at least partially fills the first valley area.

2. The semiconductor device of claim 1 , wherein the upper conductive pattern also at least partially fills the second valley area.

3. The semiconductor device of claim 2 , wherein the upper barrier film entirely fills at least one of the first and second valley areas.

4. The semiconductor device of claim 2 , wherein

a top surface of the first lower conductive pattern includes first and second valley portions that define the first and second valley areas, respectively, and

the upper barrier film extends along all surfaces of the first and second valley portions.

5. The semiconductor device of claim 2 , wherein

a top surface of the first lower conductive pattern includes first and second valley portions that define the first and second valley areas, respectively, and

the upper barrier film extends along a partial portion of surfaces of the first and second valley portions.

6. The semiconductor device of claim 1 , wherein a depth of the first valley area is the same as a depth of the second valley area.

7. The semiconductor device of claim 1 , wherein

the first lower conductive pattern includes a lower barrier film and a lower filling film that is disposed on the lower barrier film, and

the first and second valley areas are defined by an upper surface of the lower filling film and portions of an upper surface of the lower barrier film that are not covered by the lower filling film.

8. The semiconductor device of claim 7 , wherein

the first lower conductive pattern further includes a lower liner disposed between the lower barrier film and the lower filling film, and

bottom portions of the first and second valley areas are defined by the lower liner.

9. The semiconductor device of claim 1 , wherein the second valley area filled with an insulating material.

10. The semiconductor device of claim 1 , wherein the second valley area includes a wire void.

11. The semiconductor device of claim 1 , further comprising:

a second lower conductive pattern disposed in the first interlayer insulating film and spaced apart from the first lower conductive pattern in the first direction,

wherein the second lower conductive pattern includes third and fourth valley areas that are spaced apart from each other in the first direction, and

wherein at least one of the third and fourth valley areas is filled with an insulating material.

12. The semiconductor device of claim 1 , further comprising:

a second lower conductive pattern disposed in the first interlayer insulating film and spaced apart from the first lower conductive pattern in the first direction,

wherein the second lower conductive pattern includes third and fourth valley areas that are spaced apart from each other in the first direction, and

wherein at least one of the third and fourth valley areas includes a wire void.

13. A semiconductor device comprising:

a lower conductive pattern including a lower barrier film that forms a filling film trench, and a lower filling film disposed on the lower barrier film in the filling film trench, the lower conductive pattern having a top surface that has a first width in a first direction that is parallel to an upper surface of a substrate; and

an upper conductive pattern disposed on the lower conductive pattern, the upper conductive pattern is connected to the lower conductive pattern and includes an upper barrier film and an upper filling film that is disposed on the upper barrier film,

wherein a bottom surface of the upper conductive pattern has a second width in the first direction,

wherein the second width is greater than or equal to the first width, and

the upper barrier film directly covers portions of the lower barrier film that form inner sidewalls of the filling film trench.

14. The semiconductor device of claim 13 , wherein

a top surface of the lower conductive pattern includes first and second valley portions, and

the first and second valley portions are defined by the lower filling film and the portions of the lower barrier film that are covered by the upper barrier film.

15. The semiconductor device of claim 14 , wherein

the first valley portion defines a first valley area that extends in a second direction that crosses the first direction,

the second valley portion defines a second valley area that extends in the second direction, and

the first and second valley area are spaced apart from each other in the first direction.

16. The semiconductor device of claim 6 , wherein

the lower conductive pattern further includes a lower liner that is disposed between the lower barrier film and the lower filling film, and

an uppermost portion of the lower liner is lower than uppermost portions of the lower barrier film and the lower filling film.

17. A semiconductor device comprising:

a first interlayer insulating film disposed on a substrate and including a first trench;

a lower conductive pattern disposed in the first trench and including a lower barrier film, a lower liner disposed on the lower barrier film, and a lower filling film disposed on the lower liner;

a second interlayer insulating film disposed on the first interlayer insulating film and including a second trench that exposes at least a portion of a top surface of the lower conductive pattern; and

an upper conductive pattern filling the second trench and including an upper barrier film and an upper filling film disposed on the upper barrier film,

wherein the lower conductive pattern further includes valley areas that are defined by the lower barrier film, the lower liner, and the lower filling film and extend in a thickness direction of the substrate, and

wherein the upper conductive pattern fills the valley areas.

18. The semiconductor device of claim 17 , wherein a width of the top surface of the lower conductive pattern is less than or equal to a width of a bottom surface of the upper conductive pattern.

19. The semiconductor device of claim 17 , wherein a lowermost portion of the upper filling film is higher than uppermost portion of the lower barrier film.

20. The semiconductor device of claim 17 , wherein

the lower barrier film includes tantalum,

the lower liner includes cobalt, and

the lower filling film includes copper.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 4, 2020
From: YOO, SEUNG YONG; LEE, JONG JIN; KIM, RAK HWAN; JUNG, EUN-JI; HONG, WON HYUK
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 052838/0298 →
Priority Claims (1)
KR 10-2019-0118149 · Sep 25, 2019 · national
Continuity (1)
Related Publication 20210090999A1 · Mar 25, 2021