IP Library Granted Patent US 11,469,332
Granted Patent B2
US 11,469,332 · App. 16/667,615 · Granted Oct 11, 2022

Semiconductor device and manufacturing method thereof

Inventors: Wei-Ju Lee (Hsinchu County, TW); Chun-Fu Cheng (Hsinchu County, TW); Chung-Wei Wu (Hsinchu County, TW); Zhiqiang Wu (Hsinchu County, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
H01L29/78696H01L29/0673H01L29/1033H01L29/41733H01L29/42392H01L29/66742
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Quick Facts
Patent No.
US 11,469,332
App. No.
16/667,615
Granted
Oct 11, 2022
Kind
B2
Abstract

A semiconductor device includes a substrate, a plurality of nanowires, a gate structure, a source/drain epitaxy structure, and a semiconductor layer. The substrate has a protrusion portion. The nanowires extend in a first direction above the protrusion portion of the substrate, the nanowires being arranged in a second direction substantially perpendicular to the first direction. The gate structure wraps around each of the nanowires. The source/drain epitaxy structure is in contact with an end surface of each of the nanowires, in which a bottom surface of the source/drain epitaxy structure is lower than a top surface of the protrusion portion of the substrate. The semiconductor layer is in contact with the bottom surface of the epitaxy structure, in which the semiconductor layer is spaced from the protrusion portion of the substrate.

Claims (40)

1. A semiconductor device comprises:

a substrate having a protrusion portion;

a plurality of nanowires extending in a first direction above the protrusion portion of the substrate, the nanowires being arranged in a second direction substantially perpendicular to the first direction;

a gate structure wrapping around each of the nanowires;

a source/drain epitaxy structure in contact with an end surface of each of the nanowires, wherein a bottom surface of the source/drain epitaxy structure is lower than a top surface of the protrusion portion of the substrate;

a semiconductor layer in contact with the bottom surface of the epitaxy structure, wherein the semiconductor layer is spaced from the protrusion portion of the substrate; and

an oxidized layer below the source/drain epitaxy structure and wrapping around the semiconductor layer, wherein a top surface of the semiconductor layer is in contact with the source/drain epitaxy structure, and opposite sidewalls of the semiconductor layer are in contact with the oxidized layer.

2. The semiconductor device of claim 1 , wherein a topmost surface of the semiconductor layer is lower than a topmost end of the oxidized layer.

3. The semiconductor device of claim 1 , wherein the oxidized layer comprises an oxide of silicon germanium.

4. The semiconductor device of claim 1 , wherein the semiconductor layer and the nanowires comprise the same material.

5. The semiconductor device of claim 1 , further comprising a shallow trench isolation (STI) structure extending around the protrusion portion of the substrate, wherein the semiconductor layer is in contact with the STI structure.

6. The semiconductor device of claim 1 , wherein the source/drain epitaxy structure has a convex bottom end.

7. A semiconductor device comprises:

a substrate having a protrusion portion;

a plurality of nanowires extending in a first direction above the protrusion portion of the substrate, the nanowires being arranged in a second direction substantially perpendicular to the first direction;

a gate structure wrapping around each of the nanowires;

an oxidized layer extending in the protrusion portion of the substrate;

a semiconductor layer extending in the oxidized layer; and

a source/drain structure extending upwardly from the semiconductor layer and in contact with the nanowires.

8. The semiconductor device of claim 7 , wherein a top surface of the semiconductor layer is lower than a bottom surface of the gate structure.

9. The semiconductor device of claim 7 , wherein the source/drain structure is in contact with the oxidized layer.

10. The semiconductor device of claim 9 , wherein the oxidized layer forms a first interface with the source/drain structure and a second interface with the semiconductor layer, and the first interface extends upwardly from the second interface.

11. The semiconductor device of claim 10 , wherein the second interface is steeper than the first interface.

12. The semiconductor device of claim 11 , further comprising:

a plurality of inner spacers arranged in the second direction in an alternate manner with the nanowires, wherein the gate structure is spaced from the source/drain structure at least in part by the inner spacers.

13. The semiconductor device of claim 7 , wherein the oxidized layer is silicon germanium oxide.

14. A semiconductor device, comprising:

a substrate having a protrusion portion;

a plurality of first semiconductor layers vertically stacked above the protrusion portion of the substrate;

an shallow trench isolation structure laterally surrounding the protrusion portion;

a gate structure over the protrusion portion of the substrate and wrapping around each of the first semiconductor layers;

source/drain epitaxy structures over the substrate and on opposite sides of the gate structure;

an oxidized layer embedded in the protrusion portion of the substrate and below one of the source/drain epitaxy structures; and

a second semiconductor layer extending in the oxidized layer and in contact with the one of the source/drain epitaxy structures, and vertically between the oxidized layer and the one of the source/drain epitaxy structures, wherein the second semiconductor layer is spaced apart from the protrusion portion of the substrate, and wherein opposite sidewalls of the second semiconductor layer are in contact with the oxidized layer.

15. The semiconductor device of claim 14 , wherein the oxidized layer forms an inclined interface with the one of the source/drain epitaxy structures.

16. The semiconductor device of claim 14 , wherein a top surface of the oxidized layer is higher than a top surface of the second semiconductor layer.

17. The semiconductor device of claim 16 , wherein a bottom surface of the oxidized layer is lower than a bottom surface of the second semiconductor layer.

18. The semiconductor device of claim 14 , wherein the oxidized layer extends to a position vertically below a bottom surface of the second semiconductor layer.

19. The semiconductor device of claim 14 , wherein a topmost surface of the oxidized layer is higher than a bottom surface of the one of the source/drain epitaxy structures.

20. The semiconductor device of claim 14 , wherein each of the source/drain epitaxy structures has a convex bottom end.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 8, 2019
From: LEE, WEI-JU; CHENG, CHUN-FU; WU, CHUNG-WEI; WU, ZHIQIANG
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 050962/0228 →
Continuity (1)
Related Publication 20210126135A1 · Apr 29, 2021
Cited By (1)
US 12,324,195