IP Library Granted Patent US 11,489,136
Granted Patent B2
US 11,489,136 · App. 17/053,026 · Granted Nov 1, 2022

Method for providing an auxiliary electrode and device including an auxiliary electrode

Inventors: Zhibin Wang (Toronto, CA); Michael Helander (Toronto, CA)
Assignee: OTI Lumionics Inc.
H01L51/5228H01L51/56
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Quick Facts
Patent No.
US 11,489,136
App. No.
17/053,026
Granted
Nov 1, 2022
Kind
B2
Abstract

An opto-electronic device includes: (i) a substrate having a surface; (ii) a first electrode disposed over the surface; (iii) a semiconducting layer disposed over at least a portion of the first electrode; (iv) a second electrode disposed over the semiconducting layer; (v) a nucleation inhibiting coating disposed over at least a portion of the second electrode; (vi) a patterning structure disposed over the surface, the patterning structure providing a shadowed region between the patterning structure and the second electrode; (vii) an auxiliary electrode disposed over the surface; and (viii) a conductive coating disposed in the shadowed region, the conductive coating electrically connecting the auxiliary electrode and the second electrode.

Claims (50)

1. An opto-electronic device having a plurality of layers, comprising:

a first electrode disposed on a first layer surface;

a second electrode;

at least one semiconducting layer between the first electrode and the second electrode;

a nucleation-inhibiting coating (NIC) disposed in a first portion of a lateral aspect of the device, such that at least a portion of the second electrode lies between the NIC and the at least one semiconducting layer;

an auxiliary electrode disposed on a second layer surface in a second portion of the lateral aspect thereof;

a patterning structure disposed on a third layer surface in the second portion and defining a shadowed region between it and the second electrode;

a conductive coating disposed in the shadowed region electrically coupled to the second electrode and the auxiliary electrode.

2. The opto-electronic device of claim 1 , wherein the shadowed region is substantially devoid of the NIC.

3. The opto-electronic device of claim 1 , wherein the patterning structure is disposed on the auxiliary electrode.

4. The opto-electronic device of claim 1 , wherein the auxiliary electrode is disposed in the shadowed region.

5. The opto-electronic device of claim 1 , wherein the patterning structure is the auxiliary electrode.

6. The opto-electronic device of claim 1 , wherein the conductive coating is integrally formed with the auxiliary electrode.

7. The opto-electronic device of claim 1 , wherein the conductive coating is in contact with at least a part of the second electrode.

8. The opto-electronic device of claim 7 , wherein the conductive coating is disposed on at least a part of the second electrode.

9. The opto-electronic device of claim 1 , wherein the patterning structure comprises a top and a base positioned between the top and the second layer surface.

10. The opto-electronic device of claim 9 , wherein the top and base are formed of different materials.

11. The opto-electronic device of claim 9 , wherein the base is laterally recessed relative to the top to form the shadowed region.

12. The opto-electronic device of claim 9 , wherein the patterning structure comprises a sidewall having a profile that is at least one of linear, tapered and curved.

13. The opto-electronic device of claim 12 , wherein the sidewall extends between the top and the base.

14. The opto-electronic device of claim 12 , wherein the sidewall extends substantially transversely from the second layer surface.

15. The opto-electronic device of claim 12 , wherein the sidewall defines a step edge.

16. The opto-electronic device of claim 12 , wherein the conductive coating is arranged adjacent to the sidewall.

17. The opto-electronic device of claim 12 , wherein the side wall defines an overhang.

18. The opto-electronic device of claim 17 , wherein the shadowed region is defined by the overhang.

19. The opto-electronic device of claim 12 , wherein the side wall is substantially devoid of the NIC.

20. The opto-electronic device of claim 1 , further comprising at least one emissive region and at least one non-emissive region arranged adjacent thereto, wherein the emissive region comprises the first and second electrodes and the at least one semiconducting layer therebetween, and the non-emissive region comprises the auxiliary electrode and the patterning structure.

21. The opto-electronic device of claim 20 , wherein the non-emissive region comprises a pixel definition layer (PDL) disposed on a fourth layer surface.

22. The opto-electronic device of claim 21 , wherein the first layer surface and the second layer surface are the same.

23. The opto-electronic device of claim 21 , wherein the second layer surface and the third layer surface are the same.

24. The opto-electronic device of claim 21 , wherein the second layer surface is an exposed layer surface of the PDL.

25. The opto-electronic device of claim 21 , wherein the second layer surface and the fourth layer surface are the same and is an exposed layer surface of a substrate of the device.

26. The opto-electronic device of claim 25 , wherein the patterning structure comprises a plurality of facing bank structures defining a via hole region therebetween exposing the auxiliary electrode therein.

27. The opto-electronic device of claim 26 , wherein the conductive coating is disposed on the auxiliary electrode within the via hole region.

28. A method of manufacturing an opto-electronic device, comprising actions of:

providing a structure comprising:

a first electrode;

a second electrode;

at least one semiconducting layer between the first electrode and second electrode;

an auxiliary electrode disposed on a second layer surface in a second portion of a lateral aspect of the device; and

a patterning structure disposed on a third layer surface in the second portion that defines a shadowed region between in and the second electrode;

depositing a nucleation-inhibiting coating (NIC) on the second electrode in a first portion of a lateral aspect of the device; and

depositing a conductive coating in the shadowed region to electrically couple the second electrode to the auxiliary electrode.

29. The method of claim 28 , wherein the action of depositing the conductive coating is performed using at least one of no mask and an open mask.

30. The method of claim 28 , wherein the action of depositing the conductive coating comprises exposing the NIC and the shadowed region to an evaporated flux of a conductive coating material for forming the conductive coating.

31. The method of claim 30 , wherein the evaporated flux is at least partially non-collimated.

32. The method of claim 30 , wherein the NIC and the shadowed region are exposed to at least a part of the evaporated flux at an angle that is other than substantially transverse to a plane of the third layer surface.

33. The method of claim 30 , wherein the method comprises subjecting the device, during the action of exposing, to at least one of an angular displacement, lateral displacement and a displacement substantially transverse to a plane of the third layer surface.

34. The method of claim 30 , wherein the action of subjecting comprises rotating the device about an axis that is substantially transverse to a plane of the third layer surface.

35. The method of claim 30 , wherein the action of exposing comprises generating the evaporated flux by at least one of a point evaporation source, a linear evaporation source, a surface evaporation source, an array thereof and any combination of any of these.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 2, 2021
From: WANG, ZHIBIN; HELANDER, MICHAEL
To: OTI LUMIONICS INC.
Reel/Frame 055464/0481 →
Continuity (3)
Provisional Application 62729889 · Sep 11, 2018
Provisional Application 62668134 · May 7, 2018
Related Publication 20210135150A1 · May 6, 2021
Cited By (1)
US 12,520,681