IP Library Granted Patent US 11,509,840
Granted Patent B2
US 11,509,840 · App. 17/047,564 · Granted Nov 22, 2022

Solid-state imaging device, signal processing chip, and electronic apparatus

Inventor: Hayato Wakabayashi (Tokyo, JP)
Assignee: Sony Semiconductor Solutions Corporation
H04N5/343G06V10/22H04N5/06H04N5/2258H04N5/3454H04N5/3456H04N5/351H04N5/379
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Quick Facts
Patent No.
US 11,509,840
App. No.
17/047,564
Granted
Nov 22, 2022
Kind
B2
Abstract

The present technology relates to a solid-state imaging device, a signal processing chip, and an electronic apparatus that make it possible to utilize the result of detecting an occurrence of an event in imaging. The solid-state imaging device includes: an event detection unit that detects, as an event, a change in an electrical signal generated by each pixel of a pixel array unit; a region-of-interest detection unit that detects, from a result of detecting the event, a region-of-interest of the pixel array unit; and a pixel signal generation unit that generates a pixel signal constituting an image of a region corresponding to the region-of-interest. The present technology is applicable to, for example, a sensor that detects an event that is a change in an electrical signal of a pixel.

Claims (34)

1. A solid-state imaging device, comprising:

an event detection circuit configured to detect, as an event, a change in an electrical signal generated by each pixel of a pixel array unit;

a processor configured to detect, from a result of detecting the event, a region-of-interest of the pixel array unit;

a pixel signal generation circuit that generates a pixel signal constituting an image of a region corresponding to the region-of-interest; and

a memory that accumulates the event occurred in each pixel of the pixel array unit in frame units, wherein

the processor is configured to detect the region-of-interest of the pixel array unit from event data in the frame units, to identify an object to be detected from the event data in the frame units, to detect a region including the object as the region-of-interest, and to determine reliability of object detection by a detection ratio of the object and control the frame units.

2. The solid-state imaging device according to claim 1 , wherein

the processor is configured to control an imaging cycle of the pixel signal generation circuit in accordance with the frame units.

3. The solid-state imaging device according to claim 1 , further comprising

an imaging-synchronization-signal generation circuit configured to generate an imaging synchronization signal for making an imaging cycle of the pixel signal generation circuit the same as a detection cycle of the object.

4. The solid-state imaging device according to claim 1 , further comprising

an imaging-synchronization-signal generation circuit configured to generate an imaging synchronization signal for making an imaging cycle of the pixel signal generation circuit a video rate.

5. The solid-state imaging device according to claim 1 , wherein

the event detection circuit and the pixel signal generation circuit reside in different chips.

6. The solid-state imaging device according to claim 5 , wherein

the pixel signal generation circuit generates the pixel signal of a region of the pixel array unit of the chip of the pixel signal generation circuit, the region corresponding to the region-of-interest of the chip of the event detection circuit.

7. The solid-state imaging device according to claim 1 , wherein

the event detection circuit, the processor, and the pixel signal generation circuit reside in different chips.

8. The solid-state imaging device according to claim 1 , wherein

the event detection circuit and the pixel signal generation circuit reside in the same chip.

9. The solid-state imaging device according to claim 1 , wherein

a photoelectric conversion element of each pixel of the pixel array unit is shared by the event detection circuit and the pixel signal generation circuit.

10. The solid-state imaging device according to claim 1 , wherein

each pixel of the pixel array unit includes a pixel for detecting the event or a pixel for generating the pixel signal.

11. An electronic apparatus, comprising:

a solid-state imaging device including

an event detection circuit configured to detect, as an event, a change in an electrical signal generated by each pixel of a pixel array unit,

a processor configured to detect, from a result of detecting the event, a region-of-interest of the pixel array unit,

a pixel signal generation circuit configured to generate a pixel signal constituting an image of a region corresponding to the region-of-interest, and

a memory that accumulates the event occurred in each pixel of the pixel array unit in frame units, wherein

the processor is configured to detect the region-of-interest of the pixel array unit from event data in the frame units, to identify an object to be detected from the event data in the frame units, detect a region including the object as the region-of-interest, and to determine reliability of object detection by a detection ratio of the object and control the frame units.

12. The electronic apparatus according to claim 11 , wherein the processor is configured to control an imaging cycle of the pixel signal generation circuit in accordance with the frame units.

13. The electronic apparatus according to claim 11 , further comprising:

an imaging-synchronization-signal generation circuit configured to generate an imaging synchronization signal for making an imaging cycle of the pixel signal generation circuit the same as a detection cycle of the object.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 14, 2020
From: WAKABAYASHI, HAYATO
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 054053/0472 →
Priority Claims (1)
JP JP2018-227821 · Dec 5, 2018 · national
Continuity (1)
Related Publication 20210152757A1 · May 20, 2021