Mechanism to trigger early termination of cooperating processes
Devices and techniques for triggering early termination of cooperating processes in a processor are described herein. A system includes multiple memory-compute nodes, wherein a memory-compute node comprises: event manager circuitry configured to establish a broadcast channel to receive event messages; and thread manager circuitry configured to organize a plurality of threads to perform portions of a cooperative task, wherein the plurality of threads each monitor the broadcast channel to receive event messages on the broadcast channel, and wherein upon achieving a threshold operation, the thread manager circuitry is to use the event manager circuitry to broadcast, on the broadcast channel, an event message indicating that the cooperative task is complete, causing other threads, in response to receiving the event message, to terminate execution of their respective portions of the cooperative task.
1. A system comprising:
multiple memory-compute nodes coupled to each other over a scale fabric, wherein each of the memory-compute nodes comprise a hybrid threading processor and a hybrid threading fabric configured to execute multiple processing threads, wherein at least one memory-compute node comprises:
event manager circuitry configured to establish a broadcast channel to receive event messages; and
thread manager circuitry configured to organize a plurality of threads to perform portions of a cooperative task, wherein the plurality of threads each monitor the broadcast channel for event messages, and wherein, upon achieving a threshold operation, the thread manager circuitry is to use the event manager circuitry to broadcast, on the broadcast channel, an event message indicating that the cooperative task is complete, causing other threads, in response to receiving the event message, to terminate execution of their respective portions of the cooperative task.
2. The system of claim 1 , wherein to monitor the broadcast channel, the thread manager circuitry organizes each thread of the plurality of threads to implement a no-wait instruction.
3. The system of claim 2 , wherein the no-wait instruction queries a register for a non-zero value, which represents an occurrence of an event associated with the event message.
4. The system of claim 3 , wherein the non-zero value is a 16-bit value.
5. The system of claim 4 , wherein the non-zero value is the broadcast channel.
6. The system of claim 1 , wherein the system comprises a processor.
7. The system of claim 6 , wherein the processor is a hybrid threading processor (HTP).
8. The system of claim 6 , wherein the processor is integrated in a chiplet of the system.
9. The system of claim 1 , wherein the threshold operation is a successful search result of a search algorithm.
10. A method comprising:
establishing, with event manager circuitry, a broadcast channel to receive event messages, the event messages for event handling on a memory-compute node, the memory-compute node one of multiple memory-compute nodes coupled to each other over a scale fabric in a system, each of the memory-compute nodes comprising a hybrid threading processor and a hybrid threading fabric configured to execute multiple processing threads; and
organizing, in thread manager circuitry, a plurality of threads to perform portions of a cooperative task, wherein the plurality of threads each monitor the broadcast channel for event messages, and wherein, upon achieving a threshold operation, the thread manager circuitry is to use the event manager circuitry to broadcast, on the broadcast channel, an event message indicating that the cooperative task is complete, causing other threads, in response to receiving the event message, to terminate execution of their respective portions of the cooperative task.
11. The method of claim 10 , wherein to monitor the broadcast channel, each thread of the plurality of threads implements a no-wait instruction.
12. The method of claim 11 , wherein the no-wait instruction queries a register for a non-zero value, which represents an occurrence of an event associated with the event message.
13. The method of claim 12 , wherein the non-zero value is a 16-bit value.
14. The method of claim 13 , wherein the non-zero value is the broadcast channel.
15. The method of claim 10 , wherein the system comprises a processor.
16. The method of claim 15 , wherein the processor is a hybrid threading processor (HTP).
17. The method of claim 15 , wherein the processor is integrated in a chiplet of the system.
18. The method of claim 10 , wherein the threshold operation is a successful search result of a search algorithm.
19. A non-transitory machine-readable medium including instructions, which when executed by a machine, cause the machine to:
establish a broadcast channel to receive event messages, the event messages for event handling on a memory-compute node, the memory-compute node one of multiple memory-compute nodes coupled to each other over a scale fabric in a system, each of the memory-compute nodes comprising a hybrid threading processor and a hybrid threading fabric configured to execute multiple processing threads; and
organize a plurality of threads to perform portions of a cooperative task, wherein the plurality of threads each monitor the broadcast channel for event messages, and wherein one thread, upon achieving a threshold operation, is to broadcast, on the broadcast channel, an event message indicating that the cooperative task is complete, where the event message causes other threads, in response to receiving the event message, to terminate execution of their respective portions of the cooperative task.
20. The machine-readable medium of claim 19 , wherein to monitor the broadcast channel, each thread of the plurality of threads implements a no-wait instruction.