Communication apparatus and control signal mapping method
A communication apparatus includes a circuitry and a transmitter. In operation, the circuitry generates a Demodulation Reference Signal (DMRS) and generates downlink control information indicating a mapping pattern of the DMRS from a plurality of mapping patterns, and the transmitter transmits the DMRS and the downlink control information. The plurality of mapping patterns include a first mapping pattern and a second mapping pattern. Resource elements used for the DMRS of the second mapping pattern are same as a part of resource elements used for the DMRS of the first mapping pattern. A number of the resource elements used for the DMRS of the first mapping pattern is larger than a number of the resource elements used for the DMRS of the second mapping pattern.
1. An integrated circuit comprising:
circuitry, which, in operation, controls:
generating a Demodulation Reference Signal (DMRS) and generating downlink control information indicating a mapping pattern of the DMRS from a plurality of mapping patterns; and
transmission circuitry which, in operation, controls transmitting the DMRS and the downlink control information,
wherein the plurality of mapping patterns includes a first mapping pattern and a second mapping pattern,
wherein resource elements used for the DMRS of the second mapping pattern are same as a part of resource elements used for the DMRS of the first mapping pattern, and
wherein a number of the resource elements used for the DMRS of the first mapping pattern is larger than a number of the resource elements used for the DMRS of the second mapping pattern.
2. The integrated circuit according to claim 1 , wherein resource elements, which are used for the DMRS of the first mapping pattern and which are not used for the DMRS of the second mapping pattern, are used for a transmission of data in the second mapping pattern.
3. The integrated circuit according to claim 1 , wherein the first mapping pattern and the second mapping pattern have a resource element used for the DMRS in a first half of a time unit and in a second half of the time unit, the time unit being configured of 14 Orthogonal Frequency-Division Multiplexing (OFDM) symbols.
4. The integrated circuit according to claim 1 , wherein the downlink control information includes a plurality of bits that indicate the mapping pattern from the plurality of mapping patterns.
5. The communication apparatus integrated circuit according to claim 1 , wherein two adjacent Orthogonal Frequency-Division Multiplexing (OFDM) symbols are used for a DMRS transmission for at least one of the plurality of mapping patterns.
6. The integrated circuit according to claim 1 , wherein the plurality of the mapping patterns is indicated by a higher layer signaling.
7. The integrated circuit according to claim 1 , wherein the downlink control information is transmitted on a Physical Downlink Control Channel (PDCCH) or an Enhanced Physical Downlink Control Channel (EPDCCH).
8. The integrated circuit according to claim 1 , wherein each of the plurality of the mapping patterns has a different density of DMRS in a frequency domain.
9. The integrated circuit according to claim 1 , wherein each of the plurality of the mapping patterns has a different density of DMRS in a time domain.