IP Library › Granted Patent US 11,580,287
Granted Patent B1
US 11,580,287 · App. 17/530,874 · Granted Feb 14, 2023

Isolation of compartments in a layered printed circuit board, and apparatus and methods for the same

Inventors: Thomas Scott Morgan (Virginia Beach, VA); Martin Mayer (Bartlesville, OK); Steven Yates (Charlottesville, VA)
Assignee: Management Service Group, Inc.
G06F30/394H05K1/0216H05K1/115H05K1/181H05K3/46G06F2115/12H05K2201/1006H05K2201/10159H05K2201/10613
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Quick Facts
Patent No.
US 11,580,287
App. No.
17/530,874
Granted
Feb 14, 2023
Kind
B1
Abstract

In some embodiments, an apparatus can include a printed circuit board (PCB) that has layers and includes a first portion and a second portion. The first portion can have a data port and a power port. A first layer is associated with data of the first portion of the PCB, and a second layer is associated with power of the first portion of the PCB. The second portion can have a data port and a power port. A third layer is associated with data of the second portion, and a fourth layer is associated with power of the second portion. The first portion or the second portion can have vias defining an electromagnetic interference (EMI) shield. The apparatus can include a power filter and a data filter that can, respectively, isolate power and data of the first portion from the second portion.

Claims (63)

1. An apparatus, comprising:

a printed circuit board (PCB) having a plurality of layers and including a first portion and a second portion mutually exclusive and physically separate from the first portion,

the first portion of the PCB having a data port and a power port, a first layer from the plurality of layers being associated with data of the first portion of the PCB, a second layer from the plurality of layers being associated with power of the first portion of the PCB and different from the first layer,

the second portion of the PCB having a data port and a power port, a third layer from the plurality of layers being associated with data of the second portion of the PCB and different from the first layer and the second layer, a fourth layer from the plurality of layers being associated with power of the second portion of the PCB and different from the first layer, the second layer and the third layer,

a power filter operatively coupled to the power port of the first portion of the PCB and the power port of the second portion of the PCB;

an electrical-to-optical (e2o) converter operatively coupled to the data port of the first portion of the PCB;

an optical fiber operatively coupled to the e2o converter; and

an optical-to-electrical (o2e) converter operatively coupled to the optical fiber and the data port of the second portion of the PCB.

2. The apparatus of claim 1 , wherein:

the power filter is configured to isolate power of the first portion of the PCB from the power of the second portion of the PCB, and

the e2o converter, the optical fiber and the o2e converter collectively are configured to prevent data leakage between the first portion of the PCB and the second portion of the PCB.

3. The apparatus of claim 1 , wherein:

the first portion of PCB having a plurality of vias defining an electromagnetic interference (EMI) shield portion for the first portion of the PCB, the second portion of the PCB having a plurality of vias defining an EMI shield portion for the second portion of the PCB.

4. The apparatus of claim 1 , wherein the first portion of the PCB is configured to perform a first function and not a second function, the second portion of the PCB is configured to perform the second function and not the first function.

5. The apparatus of claim 1 , wherein the first portion of the PCB is configured to perform processing functions and not storage functions, the second portion of the PCB is configured to perform storage function and not processing function.

6. The apparatus of claim 1 , wherein:

the data port of the first portion of the PCB is defined by a via between the first layer and an outer surface of the PCB,

the power port of the first portion of the PCB is defined by a via between the second layer and an outer surface of the PCB,

the data port of the second portion of the PCB is defined by a via between the third layer and the outer surface of the PCB, and

the power port of the second portion of the PCB is defined by a via between the fourth layer and the outer surface of the PCB.

7. The apparatus of claim 1 , wherein:

the power port of the first portion of the PCB is defined by a via between the second layer and an outer surface of the PCB,

the power port of the second portion of the PCB is defined by a via between the fourth layer and the outer surface of the PCB,

the power filter being operatively coupled to the power port of the first portion of the PCB and the power port of the second portion of the PCB to provide power isolation between the first portion of the PCB and the second portion of the PCB.

8. The apparatus of claim 1 , wherein:

the data port of the first portion of the PCB is defined by a via between the first layer and an outer surface of the PCB,

the data port of the second portion of the PCB is defined by a via between the third layer and the outer surface of the PCB,

the e2o converter being operatively coupled to the data port of the first portion of the PCB and the o2e converter being operatively coupled to the data port of the second portion of the PCB to prevent unintentional transfer of data between the first portion of the PCB and the second portion of the PCB.

9. The apparatus of claim 1 , wherein the data filter is included within an integrated circuit (IC) that performs data filtering and/or signal conditioning during operation of the IC, the IC having a first pin operatively coupled to the data port of the first portion of the PCB, the IC having a second pin operatively coupled to the data port of the second portion of the PCB.

10. The apparatus of claim 1 , wherein the e2o converter includes a light source and the o2e converter includes a photodetector, the apparatus further comprising:

an optical filter operatively coupled to the e2o converter and the optical fiber.

11. The apparatus of claim 1 , wherein the e2o converter includes a light source and the o2e converter includes a photodetector, the apparatus further comprising:

an optical filter operatively coupled to the e2o converter and a first end of the optical fiber,

the o2e converter operatively coupled to a second end of the optical fiber opposite the first end.

12. The apparatus of claim 1 , wherein:

the first portion of PCB having a plurality of vias defining an electromagnetic interference (EMI) shield portion for the first portion of the PCB, the second portion of the PCB having a plurality of vias defining an EMI shield portion for the second portion of the PCB,

the plurality of vias for the first portion of the PCB define at least one row of vias along an edge of the first portion of the PCB,

the plurality of vias for the second portion of the PCB define at least one row of vias along an edge of the second of the PCB,

the edge of the first portion of the PCB and the edge of the second portion of the PCB substantially abutting each other.

13. A method, comprising:

transferring data from a first portion of a printed circuit board (PCB) and a first layer from a plurality of layers of the PCB to a second portion of the PCB and a second layer from the plurality of layers of the PCB, the first portion of the PCB being mutually exclusive and physically separate from the second portion of the PCB, the first layer being different from the second layer;

filtering, during transferring data and via a data filter, the data to prevent data leakage from the first portion of the PCB to the second portion of the PCB, the data filter including electrical-to-optical (e2o) converter, an optical fiber and an optical-to-electrical (o2e) converter;

transferring power from the first portion of the PCB and a third layer from the plurality of layers of the PCB to the second portion of the PCB and a fourth layer from the plurality of layers of the PCB, the third layer being different from the first layer and the second layer, the fourth layer being different from the first layer, the second layer and the third layer; and

filtering, during transferring power, the power to isolate power of the first portion of the PCB from the power of the second portion of the PCB.

14. The method of claim 13 , further comprising:

shielding electromagnetic interference (EMI) between the first portion of the PCB and the power of the second portion of the PCB.

15. The method of claim 13 , wherein the shielding is performed by a plurality of vias for the first portion of the PCB disposed in at least one row of vias along an edge of the first portion of the PCB and by a plurality of vias for the second portion of the PCB disposed in at least one row of vias along an edge of the second of the PCB, the edge of the first portion of the PCB and the edge of the second portion of the PCB substantially abutting each other.

16. The method of claim 13 , further comprising:

performing a first function at the first portion of the PCB and not a second function; and

performing the second function at the second portion of the PCB and not the first function.

17. The method of claim 13 , wherein:

a power port of the first portion of the PCB is defined by a via between the second layer and an outer surface of the PCB,

a power port of the second portion of the PCB is defined by a via between the fourth layer and the outer surface of the PCB,

the power filtering being performed by a power filter operatively coupled to the power port of the first portion of the PCB and the power port of the second portion of the PCB to provide power supply isolation between the first portion of the PCB and the second portion of the PCB.

18. The method of claim 13 , wherein:

a data port of the first portion of the PCB is defined by a via between the first layer and an outer surface of the PCB,

a data port of the second portion of the PCB is defined by a via between the third layer and the outer surface of the PCB,

the data filter operatively coupled to the data port of the first portion of the PCB and the data port of the second portion of the PCB to prevent unintentional transfer of data between the first portion of the PCB and the second portion of the PCB.

19. The method of claim 13 , wherein the data filtering is performed by an integrated circuit (IC) having a first pin operatively coupled to a data port of the first portion of the PCB, and having a second pin operatively coupled to a data port of the second portion of the PCB.

20. The method of claim 13 , wherein the data filtering includes:

converting, via the e2o converter, the data from an electrical signal associated with the first portion of the PCB to an optical signal;

sending the optical signal via an optical fiber; and

converting, via the o2e converter, the optical signal to an electric signal associated with the second portion of the PCB.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 22, 2021
From: MORGAN, THOMAS SCOTT; MAYER, MARTIN
To: MANAGEMENT SERVICES GROUP, INC., DOING BUSINESS AS (DBA) GLOBAL TECHNICAL SYSTEMS
Reel/Frame 058179/0782 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 22, 2021
From: YATES, STEVEN
To: NSPYR, LLC
Reel/Frame 058179/0820 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 22, 2021
From: NSPYR, LLC
To: MANAGEMENT SERVICES GROUP, INC., DOING BUSINESS AS (DBA) GLOBAL TECHNICAL SYSTEMS
Reel/Frame 058179/0863 →
Continuity (2)
Division 17169703 · Feb 8, 2021
Provisional Application 63057463 · Jul 28, 2020
Cited By (1)
US 12,437,139