Voltage calibration scans to reduce memory device overhead
A voltage calibration scan is initiated. A first value of a data state metric measured for a sample block of a memory device based on associated with a first bin of blocks designated as a current is received. The first value is designated as a minimum value. A second value of the data state metric for the sample block is measured based on a set of read voltage offsets associated with a second bin of blocks having an index value higher than the current bin. In response to determining that the second value exceeds the first value, the first bin is maintained as the current bin and the voltage calibration scan is stopped.
1. A system comprising:
a memory device; and
a processing device, operatively coupled with the memory device, to perform operations comprising:
initiating a voltage calibration scan;
receiving a first value of a data state metric measured for a sample block of the memory device based on a first set of read voltage offsets associated with a first bin of blocks designed as a current bin, wherein the first value is designated as a minimum value of the data state metric;
measuring a second value of the data state metric for the sample block based on a second set of read voltage offsets associated with a second bin of blocks having an index value higher than the current bin;
determining that the second value exceeds the first value; and
in response to determining that the second value exceeds the first value, maintaining the first bin as the current bin and stopping the voltage calibration scan.
2. The system of claim 1 , wherein receiving the first value comprises measuring the first value.
3. The system of claim 1 , wherein the operations further comprise storing the current bin in non-volatile memory prior to initiating the voltage calibration scan.
4. The system of claim 3 , wherein the operations further comprise, after stopping the voltage calibration scan:
initiating a second voltage calibration scan; and
measuring a third value of the data state metric for the sample block based on a set of read voltage offsets associated with a third bin of blocks having an index value higher than the first bin.
5. The system of claim 4 , wherein the operations further comprise:
determining that the third value does not exceed the first value; and
in response to determining that the third value does not exceed the first value, updating the current bin with the third bin and the minimum value with the third value.
6. The system of claim 1 , wherein the current bin has an index value higher than at least one other bin.
7. The system of claim 1 , wherein the data state metric is raw bit error rate (RBER).
8. The system of claim 1 , wherein the data state metric is a distance to an optimal valley associated with a shifted threshold voltage distribution.
9. A method comprising:
initiating, by a processing device, a voltage calibration scan;
receiving, by the processing device, a first value of a data state metric measured for a sample block of a memory device associated with a first bin of blocks designated as a current bin, wherein the first value is designated as a minimum value;
measuring, by the processing device, a second value of the data state metric for the sample block based on a set of read voltage offsets associated with a second bin of blocks having an index value higher than the current bin;
determining, by the processing device, that the second value does not exceed the first value; and
in response to determining that the second value does not exceed the first value, updating, by the processing device, the current bin with the second bin and the minimum value with the second value.
10. The method of claim 9 , wherein receiving the first value of the data state metric comprises measuring the first value.
11. The method of claim 9 , further comprising storing, by the processing device, the current bin in non-volatile memory prior to initiating the voltage calibration scan.
12. The method of claim 9 , further comprising, after updating the second bin as the current bin and the second value as the minimum value:
initiating, by the processing device, a second voltage calibration scan; and
measuring a third value of the data state metric for the sample block based on a set of read voltage offsets associated with a third bin of blocks having an index value higher than the second bin.
13. The method of claim 12 , further comprising:
determining, by the processing device, that the third value exceeds the second value; and
maintaining, by the processing device, the second bin as the current bin in response to determining that the third value exceeds the second value.
14. The method of claim 9 , wherein the data state metric is raw bit error rate (RBER).
15. The method of claim 9 , wherein the data state metric is a distance to an optimal valley associated with a shifted threshold voltage distribution.
16. A non-transitory computer-readable storage medium comprising instructions that, when executed by a processing device, cause the processing device to perform operations comprising:
initiating a first voltage calibration scan;
receiving a first value of a data state metric measured for a sample block of a memory device based on a set of read voltage offsets associated with a first bin of blocks designed as a current bin, wherein the first value is designated as a minimum value of the data state metric;
measuring a second value of the data state metric for the sample block based on a set of read voltage offsets associated with a second bin of blocks having an index value higher than the current bin;
determining that the second value does not exceed the first value;
in response to determining that the second value does not exceed the first value, updating the second bin as the current bin and the second value as the minimum value;
initiating a second voltage calibration scan;
measuring a third value of the data state metric for the sample block based on a set of read voltage offsets associated with a third bin of blocks having an index value higher than the second bin;
determining that the third value exceeds the second value; and
in response to determining that the third value exceeds the second value, maintaining the second bin as the current bin and stopping the second voltage calibration scan.
17. The non-transitory computer-readable storage medium of claim 16 , wherein receiving the first value of the data state metric comprises measuring the first value.
18. The non-transitory computer-readable storage medium of claim 16 , wherein the operations further comprise storing the current bin in non-volatile memory prior to initiating the first voltage calibration scan.
19. The non-transitory computer-readable storage medium of claim 18 , wherein the data state metric is at least one of raw bit error rate (RBER).
20. The non-transitory computer-readable storage medium of claim 16 , wherein the data state metric is a distance to an optimal valley associated with a shifted threshold voltage distribution.