IP Library › Granted Patent US 11,600,312
Granted Patent B1
US 11,600,312 · App. 17/402,921 · Granted Mar 7, 2023

Activate commands for memory preparation

Inventors: Andreas Schneider (Gernlinden, DE); Casto Salobrena Garcia (Munich, DE); Martin Brox (Munich, DE); Nobuyuki Umeda (Tokyo, JP); Peter Mayer (Neubiberg, DE); Rethin Raj (Augsburg, DE)
Assignee: Micron Technology, Inc.
G11C7/222G11C7/1048G11C7/1063G11C7/1069G11C7/1096
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Quick Facts
Patent No.
US 11,600,312
App. No.
17/402,921
Granted
Mar 7, 2023
Kind
B1
Abstract

Methods, systems, and devices for activate commands for memory preparation are described. A memory device may receive an activate command for a row of a memory bank in the memory device. The activate command may include an indicator that indicates a type of an access operation associated with the activate command. The memory device may perform, based on the type of the access operation, an operation to prepare the memory device for the access operation. The memory device may then receive an access command for the access operation after performing the operation to prepare the memory device for the access operation.

Claims (56)

1. A method at a memory device, comprising:

receiving an activate command for a row of a memory bank in the memory device, the activate command comprising an indicator that indicates a corresponding access command for the row of the memory bank is a write command or a read command;

activating a first clock associated with writing or a second clock associated with reading based at least in part on the indicator in the activate command; and

receiving the access command after activating the first clock or the second clock.

2. The method of claim 1 , further comprising:

writing a set of data to the row of the memory bank, or reading a set of data from the row of the memory bank, based at least in part on receiving the access command.

3. The method of claim 1 , wherein the indicator indicates that the access command is a write command, the method further comprising:

activating, before receiving the write command, a receiver based at least in part on the indicator in the activate command indicating the write command; and

receiving a set of data to be written to the row of the memory bank based at least in part on activating the receiver.

4. The method of claim 1 , wherein the indicator indicates that the access command is a read command, the method further comprising:

activating, before receiving the read command, a transmitter based at least in part on the indicator in the activate command indicating the read command; and

transmitting a set of data from the row of the memory bank based at least in part on activating the transmitter.

5. The method of claim 1 , further comprising:

receiving a precharge command for the row of the memory bank; and

deactivating the first clock or the second clock based at least in part on the precharge command.

6. The method of claim 1 , further comprising:

receiving a second activate command for the row of the memory bank, the second activate command comprising a second indicator that indicates a second access command following the second activate command is of a same type as the access command.

7. The method of claim 1 , further comprising:

receiving a second activate command for the row of the memory bank, the second activate command excluding a second indicator that indicates a second access command following the second activate command is of a same type as the access command.

8. A method at a memory device, comprising:

receiving an activate command for a row of a memory bank in the memory device, the activate command comprising an indicator that indicates a type of an access operation associated with the activate command;

performing, based at least in part on the type of the access operation, an operation to prepare the memory device for the access operation; and

receiving an access command for the access operation after performing the operation to prepare the memory device for the access operation.

9. The method of claim 8 , wherein the access command comprises a write command and the access operation comprises a write operation, the method further comprising:

performing the write operation based at least in part on receiving the write command.

10. The method of claim 8 , wherein the access command comprises a read command and the access operation comprises a read operation, the method further comprising:

performing the read operation based at least in part on receiving the read command.

11. The method of claim 8 , further comprising:

activating the row of the memory bank based at least in part receiving the activate command, wherein the row is activated before or after performing the operation to prepare the memory device for the access operation.

12. The method of claim 8 , further comprising:

activating the row of the memory bank based at least in part receiving the activate command, wherein the row is activated at least partially concurrent with performing the operation to prepare the memory device for the access operation.

13. The method of claim 8 , wherein the access operation comprises a write operation, and wherein performing the operation comprises:

activating a clock associated with writing based at least in part on the indicator in the activate command indicating the write operation.

14. The method of claim 8 , wherein the access operation comprises a read operation, and wherein performing the operation comprises:

activating a clock associated with reading based at least in part on the indicator in the activate command indicating the read operation.

15. The method of claim 14 , further comprising:

receiving a precharge command for the row;

deactivating the clock based at least in part on the precharge command;

receiving a second activate command comprising a second indicator that indicates a write operation associated with the second activate command; and

activating a second clock associated with writing based at least in part on the second indicator in the second activate command indicating the write operation.

16. The method of claim 8 , wherein the indicator indicates a write operation, and wherein performing the operation comprises:

activating a receiver of the memory device; the method further comprising:

receiving a set of data for the write operation using the activated receiver.

17. A method at a controller, comprising:

determining a row of a memory bank in a memory of a memory device for a type of an access operation;

transmitting an activate command for the row of the memory bank to the memory device based at least in part on the determination, the activate command comprising an indicator that indicates the type of the access operation; and

transmitting an access command of the type for the row of the memory bank based at least in part on transmitting the activate command for the row of the memory bank.

18. The method of claim 17 , further comprising:

transmitting a second activate command that is associated with a second access operation and that comprises a second indicator that indicates the second access operation is of the type.

19. The method of claim 17 , further comprising:

determining that a second access operation associated with the row is of the type; and

transmitting, based at least in part on determining that the second access operation is of the type, a second activate command that is associated with the second access operation and that excludes a second indicator that indicates the second access operation is of the type.

20. The method of claim 17 , wherein determining comprises determining the row of the memory bank for a read operation, the method further comprising:

transmitting a precharge command for the row of the memory bank;

determining a second row for a write operation; and

transmitting a second activate command to the memory device, the second activate command comprising a second indicator that indicates the write operation.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 9, 2021
From: SCHNEIDER, ANDREAS; SALOBRENA GARCIA, CASTO; BROX, MARTIN; UMEDA, NOBUYUKI; MAYER, PETER; RAJ, RETHIN
To: MICRON TECHNOLOGY, INC.
Reel/Frame 057429/0949 →
Cited By (1)
US 12,315,593