IP Library Granted Patent US 11,601,357
Granted Patent B2
US 11,601,357 · App. 17/129,950 · Granted Mar 7, 2023

System and method for generation of quality metrics for optimization tasks in topology synthesis of a network

Inventors: Moez Cherif (Santa Cruz, CA); Benoit de Lescure (Campbell, CA)
Assignee: ARTERIS, INC.
H04L45/12H04L45/02H04L45/302H04L45/42
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Quick Facts
Patent No.
US 11,601,357
App. No.
17/129,950
Granted
Mar 7, 2023
Kind
B2
Abstract

System and methods are disclosed to qualify networks properties and that can be used for topology synthesis of networks, such as a network-on-chip (NoC). In accordance with various embodiments and different aspects of the invention, quality metric are generated, analyzed, and used to determine a quantitative quality set of values for a given generated solution for a network. The method disclosed allows the network designer or an automated network generation process to understand if the results produced are a good, an average or a bad solution. The advantage of the invention includes simplification of design process and the work of the designer by using quality metrics. Various quality metrics are generated using network definitions. These quality metrics provide quality evaluation and the quality assessment of the optimization process for a generated (optimized) network. The quality metrics include analyzing latency through a network and analyzing total wore length used by the network.

Claims (16)

1. A method for computing a quantitative network quality metric using at least one latency quality metric, the method comprising:

receiving, at a tool, a network information for connecting a plurality of initiators and a plurality of targets to a network having a plurality of switches;

determining a shortest path for each initiator-target pair from the plurality of initiators and the plurality of targets based on floorplan constraints of the network;

determining an actual path between each of the initiator-target pairs through the network;

computing a difference between each of the actual paths and each of the shortest paths for the initiator-target pairs; and

generating a visual representation of the computed difference and an average value difference,

wherein the visual representation and the average value difference represent the at least one latency quality metric of the network's latency for a packet to travel from initiator to target in the initiator-target pair.

2. The method of claim 1 , wherein the network is a network-on-chip (NoC).

3. The method of claim 2 , wherein the network information includes a plurality of definitions for any initiator's and any target's connectivity to the NoC.

4. The method of claim 1 , wherein the network information includes information about types of IP blocks that are connected to the network.

5. A tool including a non-transitory computer readable medium for storing code, which when executed by one or more processors of the tool, would cause the tool to:

determine a shortest path based on physical constraints for each initiator-target pair from a plurality of initiators and a plurality of targets connected to a network using a network information for connecting the plurality of initiators and the plurality of targets to the network;

determine an actual path between each of the initiator-target pairs through the network's elements;

compute a difference between each of the actual paths and each of the shortest paths for the initiator-target pairs; and

generate a visual representation of the computed difference and an average value difference,

wherein the visual representation and the average value difference represent a quality measurement of the network's latency for a packet to travel from initiator to target in the initiator-target pair.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 4, 2021
From: CHERIF, MOEZ; DE LESCURE, BENOIT
To: ARTERIS, INC.
Reel/Frame 055485/0712 →
Continuity (1)
Related Publication 20220200889A1 · Jun 23, 2022
Cited By (1)
US 12,237,980