Wireless communication with code separation

1. A wireless communication system comprising:

first memory;

second memory;

a first microcontroller configured to manage drivers for a wireless transceiver and direct data movement between the wireless transceiver and the first memory; and

a second microcontroller configured to communicate with other systems that generate application data to be wirelessly transmitted, wherein the application data to be wirelessly transmitted is stored in the second memory,

wherein the second microcontroller is configured to direct data movement between the second memory and the first memory.

2. The wireless communication system of claim 1 , wherein the first microcontroller and the second microcontroller are included in one of a head-mounted device (HMD) configured to output artificial reality content or a peripheral device configured to generate artificial reality content.

3. The wireless communication system of claim 1 , wherein the second microcontroller is further configured to:

determine a number of application data packets to create based on the application data stored in the second memory;

generate respective transmission headers for each of the application data packets; and

store the transmission headers in the first memory.

4. The wireless communication system of claim 3 , wherein the second microcontroller is further configured to create and store a header table in the first memory, the header table referencing locations in the first memory of the transmission headers.

5. The wireless communication system of claim 3 , wherein to direct data movement between the second memory and the first memory, the second microcontroller is configured to program a direct access memory controller with a descriptor table, the descriptor table specifying locations in the first memory of the respective transmission headers and locations in the second memory of the application data packets.

6. The wireless communication system of claim 5 , wherein the descriptor table specifies locations in the first memory to store the transmission packets.

7. The wireless communication system of claim 1 , wherein to direct data movement between the second memory and the first memory, the second microcontroller is configured to manage memory management circuitry and encryption circuitry that encrypt application data packets created from the application data and store the encrypted application data packets to the first memory with a corresponding transmission header.

8. The wireless communication system of claim 7 , wherein each one of the encrypted application data packet is capable of being decrypted separately from the other encrypted application data packets created from the same application data.

9. The wireless communication system of claim 1 , further comprising a crossbar switch, wherein the second microcontroller is communicatively coupled to the first and second memory via the crossbar switch, and wherein the first microcontroller is communicatively coupled to the first memory via the crossbar switch and is not communicatively coupled to the second memory.

10. The wireless communication system of claim 1 , wherein the first microcontroller is further configured to:

generate a wireless packets, each wireless packet comprising a transmission header and an encrypted application data packet generated from the application data; and

store the wireless packets to a transmission buffer of a data bus interface communicatively coupled to the wireless transceiver.

11. A method comprising:

in response to receiving a first signal indicative of application data being saved to a first memory, determining, by a first microcontroller, a number of application data packets to generate to wirelessly transmit the application data;

generating, by the first microcontroller, a transmission header for each of the application data packets and storing the transmission headers in a second memory;

programming, by the first microcontroller, a direct memory access controller to generate the transmission packets using the transmission headers and the application data packets and to store the transmission packets in the second memory; and

moving, by a second microcontroller separate from the first microcontroller, the transmission packets from the second memory to a transmission buffer of a wireless data bus interface communicatively coupled to a wireless transceiver.

12. The method of claim 11 , wherein the first microcontroller and the second microcontroller are included in one of a head-mounted device (HMD) configured to output artificial reality content or a peripheral device configured to generate artificial reality content.

13. The method of claim 11 , wherein storing the transmission headers in a second memory further comprises creating and storing a header table in the second memory, the header table referencing locations in the second memory of the transmission headers.

14. The method of claim 11 , wherein programming the direct access memory controller further comprises generating a descriptor table to use to generate the transmission packets, the descriptor table specifying (a) locations in the first memory of the transmission headers, (b) locations in the second memory of the corresponding application data packets, and (c) locations in first memory to store the transmission packets.

15. The method of claim 11 , wherein programming the direct memory access controller causes encryption circuitry to:

encrypt the application data packets, each encrypted application data packet being capable of being decrypted separately from the other encrypted application data packets created from the same application data; and

generate the transmission packets by storing the encrypted application data packets to the second memory with the corresponding transmission header.

16. The method of claim 11 , wherein the second microcontroller is communicatively coupled to the first and second memory via a crossbar switch, and wherein the first microcontroller is communicatively coupled to the first memory via the crossbar switch and is not communicatively coupled to the second memory.

17. A system comprising:

a wireless microcontroller configured to place transmission packets received by a wireless transceiver into a first location in a wireless memory; and

an isolation microcontroller configured to:

receive a first message from the wireless microcontroller specifying the first location;

program a direct memory access (DMA) controller to decrypt encrypted application data packets in the transmission packets and store the decrypted application data packets in a second location in a shared memory, the shared memory being separate from the wireless memory; and

when the decrypted application data packets are in the shared memory, send a second message to a subsystem processor indicating the application data packets are available in the shared memory.

18. The system of claim 17 , further comprising a crossbar switch, wherein the crossbar switch communicatively couples the isolation microcontroller to the shared memory and the wireless memory and communicatively couples the wireless controller to the wireless memory but not the shared memory.

19. The system of claim 17 , further comprising the DMA controller and an in-line encryption engine coupled to the DMA controller, the encryption engine to decrypt encrypted application data packets when pulled to the encryption engine by the DMA controller from the wireless memory.

20. The system of claim 17 , wherein to program the DMA controller, the isolation controller is further configured to provide the first location and second location to the DMA controller, the second location being received from the subsystem processor.