Programmable optimized band switching LNA
A front end module (FEM) integrated circuit (IC) architecture that uses the same LNA in each of several frequency bands extending over a wide frequency range. In some embodiments, switched impedance circuits distributed throughout the front end circuit allow selection of the frequency response and impedances that are optimized for particular performance parameters targeted for a desired device characteristic. Such switched impedance circuits tune the output and input impedance match and adjust the gain of the LNA for specific operating frequencies and gain targets. In addition, adjustments to the bias of the LNA can be used to optimize performance trade-offs between the total direct current (DC) power dissipated versus radio frequency (RF) performance. By selecting appropriate impedances throughout the circuit using switched impedance circuits, the LNA can be selectively tuned to operate optimally at a selected bias for operation within selected frequency bands.
1. A front-end circuit including:
(a) an input port configured to receive a single input signal from a selected one of at least two frequency ranges;
(b) an output port providing an amplified version of the received input signal;
(c) a low noise amplifier (LNA) including an input coupled to the input port and an output coupled to the output port;
(d) an output impedance matching network coupled between the LNA output and the output port; and
(e) an output switched impedance circuit (SIC) including at least two selectable impedance values and coupled between the LNA output and the front-end output port in parallel with the output impedance matching network.
2. The invention of claim 1 , wherein the output SIC includes at least one selectable capacitance.
3. The invention of claim 1 , wherein the LNA further includes a first input transistor including a source, and further including a degeneration SIC including at least two selectable impedance values and coupled between the source of the first input transistor of the LNA and ground.
4. The invention of claim 3 , wherein the degeneration SIC includes at least one selectable inductance.
5. The invention of claim 1 , wherein the LNA further includes a first input transistor including a gate and a source, and further including an input shunt SIC including at least two selectable impedance values and coupled between the gate and the source of the first input transistor of the LNA.
6. The invention of claim 5 , wherein the input shunt SIC includes at least one selectable capacitance.
7. The invention of claim 1 , further including an input parallel SIC including at least two selectable impedance values and coupled between the input of the LNA and ground.
8. The invention of claim 7 , wherein the input parallel SIC includes at least one selectable capacitance.
9. The invention of claim 1 , further including a shunt-coupled output SIC including at least two selectable impedance values and between the output of the LNA and ground.
10. The invention of claim 9 , wherein the output shunt SIC includes at least one selectable capacitance.
11. The invention of claim 1 , further including a load impedance coupled between a voltage source and the output of the LNA, and at least one load SIC including at least two selectable impedance values and coupled in parallel with the load impedance.
12. The invention of claim 11 , wherein the load SIC includes at least one selectable capacitance.
13. The invention of claim 11 , wherein the load SIC includes at least one selectable resistance.
14. The invention of claim 1 , wherein the front-end circuit is configured for operation in multiple narrow-band radio frequency ranges.
15. A front-end circuit including:
(a) an input port configured to receive a single input signal from a selected one of at least two frequency ranges;
(b) an output port providing an amplified version of the received input signal;
(c) a cascode low noise amplifier (LNA) including an input coupled to the input port and an output coupled to the output port, the LNA including a first input transistor including a gate coupled to the LNA input and a source;
(d) an output impedance matching network coupled between the LNA output and the output port;
(e) an output switched impedance circuit (SIC) including at least two selectable impedance values and coupled between the LNA output and the front-end output port in parallel with the output impedance matching network;
(f) an input parallel SIC including at least two selectable impedance values and coupled between the gate of the first input transistor of the LNA and ground;
(g) a shunt-coupled output SIC including at least two selectable impedance values and between the output of the LNA and ground; and
(h) an input shunt SIC including at least two selectable impedance values and coupled between the gate and the source of the first input transistor of the LNA.
16. The invention of claim 15 , wherein the LNA is a cascode LNA.
17. The invention of claim 15 , wherein the front-end circuit is configured for operation in multiple narrow-band radio frequency ranges.