IP Library › Granted Patent US 11,612,051
Granted Patent B1
US 11,612,051 · App. 17/491,582 · Granted Mar 21, 2023

Radio frequency (RF) system with RF isolation chambers and method of manufacture

Inventors: Andrew E. White (Stratham, NH); James J. LaFrance (Bedford, NH); Thomas J. Clark (Bedford, NH); Richard K. Andrews (Hampton, NH)
Assignee: LOCKHEED MARTIN CORPORATION
H05K1/0222H01L23/66H05K3/429H05K2201/068H05K2201/09618H05K2201/10098
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Quick Facts
Patent No.
US 11,612,051
App. No.
17/491,582
Granted
Mar 21, 2023
Kind
B1
Abstract

A system includes a printed circuit board (PCB). The PCB includes a radio frequency (RF) circuit that includes a plurality of circuit modules and signal trace lines. Each circuit module is electrically connected to at least one other circuit module by a signal trace line. The system includes a via fence comprising fence walls having at least two materials laminated using a printed wire board (PWB) process. The fence walls include a plurality of vias. The fence walls form a plurality of free-form RF isolation chambers, each chamber includes chamber walls that surround each circuit module outside of the PCB. The embodiments also include a method of manufacturing and/or isolating the system or components of the system.

Claims (62)

1. A system, comprising:

a printed circuit board (PCB) comprising a radio frequency (RF) circuit, the circuit comprises a plurality of circuit modules and signal trace lines, each circuit module being electrically connected to at least one other circuit module by a signal trace line; and

a via fence comprising fence walls having at least two materials laminated using a printed wire board (PWB) process and a plurality of vias formed therein, the fence walls form a plurality of free-form RF isolation chambers, each chamber includes chamber walls that surround each circuit module outside of the PCB wherein:

the at least two materials comprise a first material and a second material;

the PCB comprises a ground layer; and

the fence walls comprise:

an inner wall made of the first material; and

an encapsulating layer surrounding the inner wall, made of the second material different from the first material and electrically connected to the ground layer.

2. The system of claim 1 , wherein the RF circuit comprises an RF receiver, an RF transmitter or an RF transceiver.

3. The system of claim 1 , wherein the fence walls comprise:

a top surface; and

a bottom surface affixed to the PCB; and

further comprising:

a cover affixed to the top surface such that one or more of the chambers form a closed cavity.

4. The system of claim 3 , wherein each closed cavity is configured to reduce waveguide cavity resonance.

5. The system of claim 1 , wherein:

the fence walls comprise a bottom surface that is configured to be affixed to the ground layer;

the bottom surface includes non-conductive sections at locations where the encapsulating layer is absent; and

the signal trace line that electrically connects two adjacent circuit modules passes through the non-conductive section.

6. The system of claim 5 , further comprising solder or epoxy configured to affix the encapsulating layer to the ground layer.

7. The system of claim 6 , wherein:

the ground layer comprises a plurality of cutouts forming holes in the ground layer;

each cutout is configured to receive therethrough a corresponding circuit module that resides above a plane of the ground layer; and

the fence walls are configured to surround the holes of the plurality of cutouts.

8. The system of claim 1 , wherein:

the plurality of circuit modules has a circuit pattern having spacing distances between adjacent circuit modules; and

wherein the fence walls have a coefficient of thermal expansion (CTE) that matches the PCB.

9. A method, comprising:

forming a printed circuit board (PCB) comprising a radio frequency (RF) circuit, the circuit comprises a plurality of circuit modules and signal trace lines, each circuit module being electrically connected to at least one other circuit module by a signal trace line;

forming a via fence comprising fence walls having at least two materials laminated using a printed wire board (PWB) process and a plurality of vias formed therein, the fence walls form a plurality of free-form chambers, each chamber includes chamber walls that surround each circuit module outside of the PCB;

fabricating the PCB with a ground layer;

fabricating the fence walls with a first material and a second material, wherein the fence walls comprise:

an inner wall made of the first material, and

an encapsulating layer surrounding the inner wall, made of the second material different from the first material; and

electrically connecting the encapsulating layer to the ground layer.

10. The method of claim 9 , wherein the RF circuit comprises an RF receiver, an RF transmitter or an RF transceiver.

11. The method of claim 9 , wherein forming the via fence comprises:

forming a top surface; and

forming a bottom surface to affix to the PCB; and

the method further comprising:

forming a cover configured to be affixed to the top surface such that one or more of the chambers form a closed cavity.

12. The method of claim 11 , further comprising:

designing each closed cavity to reduce a waveguide cavity resonance.

13. The method of claim 9 , wherein:

electrically connecting the encapsulating layer to the ground layer comprises affixing a bottom surface of the fence wall to the ground layer, the bottom surface includes non-conductive sections at locations where the encapsulating layer is absent; and

the method further comprising:

passing through the non-conductive sections the signal trace line that electrically connects two adjacent circuit modules.

14. The method of claim 13 , further comprising:

soldering or epoxying the encapsulating layer to the ground layer.

15. The method of claim 14 , further comprising:

forming in the ground layer a plurality of cutouts forming holes in the ground layer;

receiving in each cutout a corresponding circuit module that resides above a plane of the ground layer; and

affixing the fence walls to the ground layer so that the fence walls surround the holes of the plurality of cutouts.

16. The method of claim 9 , wherein:

the plurality of circuit modules having a circuit pattern having spacing distances between adjacent circuit modules; and

the method further comprising:

determining whether each spacing distance between adjacent circuit modules is equal to or greater than a predetermined minimum width of the fence walls; and

in response to determining that at least one spacing distance is less than the predetermined minimum width, adjusting the circuit pattern.

17. The method of claim 9 , the method further comprising:

forming via holes in the fence walls; and

wherein the fence walls have a coefficient of thermal expansion (CTE) that matches the PCB.

18. The method of claim 9 , wherein forming the via fence comprises forming free-form RF isolation chambers.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 1, 2021
From: WHITE, ANDREW E.; LAFRANCE, JAMES J.; CLARK, THOMAS J.; ANDREWS, RICHARD K.
To: LOCKHEED MARTIN CORPORATION
Reel/Frame 057664/0860 →
Cited By (1)
US 12,272,867