IP Library Granted Patent US 11,614,959
Granted Patent B2
US 11,614,959 · App. 15/873,731 · Granted Mar 28, 2023

Coherence protocol for hardware transactional memory in shared memory using non volatile memory with log and no lock

Inventors: Hillel Avni (Munich, DE); Eliezer Levy (Munich, DE); Avi Mendelson (Munich, DE); Zuguang Wu (Hangzhou, CN)
Assignee: Huawei Technologies Co., Ltd.
G06F9/467G06F11/1441G06F11/1471G06F11/1474G06F12/0868G06F16/2365G06F12/0804G06F2212/1016
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,614,959
App. No.
15/873,731
Granted
Mar 28, 2023
Kind
B2
Abstract

The invention relates to a data processing system and a date processing method. The data processing system is configured to perform a hardware transactional memory (HTM) transaction. The data processing system comprises a byte-addressable nonvolatile memory for persistently storing data and a processor being configured to execute an atomic HTM write operation in connection with committing the HTM transaction by writing an indicator to the nonvolatile memory indicating the successful commit of the HTM transaction.

Claims (32)

1. A multiprocessor system for performing a hardware transactional memory (HTM) transaction, the multiprocessor system comprising:

a byte-addressable nonvolatile memory for persistently storing data; and

a processor communicatively coupled to the byte-addressable nonvolatile memory, the processor configured to:

execute an atomic HTM write operation in connection with committing the HTM transaction by writing an indicator to the nonvolatile memory, the indicator indicating a successful commit of the HTM transaction, the indicator comprising a commit record;

create a log record of the HTM transaction in the nonvolatile memory, wherein a data structure of the log record comprises: (1) the commit record, (2) a unique identifier of the HTM transaction, (3) data and an address of a cache memory associated with the HTM transaction, and (4) a size of the log record;

log a write operation associated with the HTM transaction in the nonvolatile memory prior to the successful commit of the HTM transaction;

flush operational data written by the HTM operation from the cache memory to the nonvolatile memory without aborting the HTM transaction;

set the HTM transaction to an unlogged state by unsetting the indicator, after the successful commit of the HTM transaction; and

evict the flushed address from the cache memory.

2. The multiprocessor system of claim 1 , wherein the processor is coupled to the cache memory by a plurality of cache lines, with the cache memory configured to be used by the processor for caching data using a cache coherence protocol.

3. The multiprocessor system of claim 1 , wherein the multiprocessor system is further configured to log the write operation associated with the HTM transaction in the nonvolatile memory by transparently flushing the log of the write operation associated with the HTM transaction to the nonvolatile memory prior to the successful commit of the HTM transaction.

4. The multiprocessor system of claim 1 , wherein the multiprocessor system further comprises a recovery unit configured to

redo the log upon a restart of the multiprocessor system, if the log of the write operation associated with the HTM transaction is present in the nonvolatile memory and the HTM transaction is in a logged state, in particular the indicator is set; and

set the HTM transaction to the unlogged state by unsetting the indicator if the redo of the transaction is completed.

5. A method for performing a hardware transactional memory (HTM) transaction in a multiprocessor system, the method comprising:

executing an atomic HTM write operation in connection with committing the HTM transaction by writing an indicator to a nonvolatile memory, the indicator indicating a successful commit of the HTM transaction, the indicator comprising a commit record;

creating a log record of the HTM transaction in the nonvolatile memory, wherein a data structure of the log record comprises: (1) the commit record, (2) a unique identifier of the HTM transaction, (3) data and an address of a cache memory associated with the HTM transaction, and (4) a size of the log record;

logging a write operation associated with the HTM transaction in the nonvolatile memory prior to the successful commit of the HTM transaction;

flushing operational data written by the HTM operation from the cache memory to the nonvolatile memory without aborting the HTM transaction;

setting the HTM transaction to an unlogged state by unsetting the indicator, after the successful commit of the HTM transaction; and

evicting the flushed address from the cache memory.

6. The method of claim 5 further comprising executing a write operation associated with the HTM transaction in the nonvolatile memory by transparently flushing the log of the write operation associated with the HTM transaction to the nonvolatile memory prior to the successful commit of the HTM transaction.

7. The method of claim 5 further comprising redoing the log upon a restart of the multiprocessor system, if the log of the write operation associated with the HTM transaction is present in the nonvolatile memory and the HTM transaction is in a logged state, in particular setting the indicator and setting the HTM transaction to the unlogged state by unsetting the indicator if the redoing of the transaction is completed.

8. The method of claim 5 , wherein the logging the write operation associated with the HTM transaction in the nonvolatile memory comprises transparently flushing a log of the write operation associated with the HTM transaction to the nonvolatile memory.

9. A non-transitory computer readable medium having stored thereon computer-executable instructions that when executed by a processor cause the processor to perform operations for performing a hardware transactional memory (HTM) transaction in a multiprocessor system, the operations comprising:

executing an atomic HTM write operation in connection with committing the HTM transaction by writing an indicator to a nonvolatile memory, the indicator indicating a successful commit of the HTM transaction, the indicator comprising a commit record;

create a log record of the HTM transaction in the nonvolatile memory, wherein a data structure of the log record comprises: (1) the commit record, (2) a unique identifier of the HTM transaction, (3) data and an address of a cache memory associated with the HTM transaction, and (4) a size of the log record;

logging a write operation associated with the HTM transaction in the nonvolatile memory prior to the successful commit of the HTM transaction;

flushing operational data written by the HTM operation from the cache memory to the nonvolatile memory without aborting the HTM transaction;

setting the HTM transaction to an unlogged state by unsetting the indicator, after the successful commit of the HTM transaction; and

evicting the flushed address from the cache memory.

10. The non-transitory computer readable medium of claim 9 , wherein the logging the write operation associated with the HTM transaction in the nonvolatile memory comprises transparently flushing a log of the write operation associated with the HTM transaction to the nonvolatile memory.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 26, 2018
From: AVNI, HILLEL; LEVY, ELIEZER; MENDELSON, AVI; WU, ZUGUANG
To: HUAWEI TECHNOLOGIES CO., LTD.
Reel/Frame 045035/0558 →
Priority Claims (1)
WO PCT/EP2015/066802 · Jul 22, 2015 · international
Continuity (2)
Continuation PCTEP2016067403 · Jul 21, 2016
Related Publication 20180143850A1 · May 24, 2018
Cited By (1)
US 12,640,218