IP Library Granted Patent US 11,626,429
Granted Patent B2
US 11,626,429 · App. 17/071,579 · Granted Apr 11, 2023

Display device and method of fabricating the same

Inventors: Sang Sub Kim (Suwon-si, KR); Keun Woo Kim (Seongnam-si, KR); Ji Yeong Shin (Suwon-si, KR); Yong Su Lee (Seoul, KR); Myoung Geun Cha (Seoul, KR); Ki Seok Choi (Seoul, KR); Sang Gun Choi (Suwon-si, KR)
Assignee: SAMSUNG DISPLAY CO., LTD.
H01L27/1274H01L27/3262H01L29/78603G09G3/32G09G2300/0809H01L21/2253H01L21/26533H01L21/28158H01L27/1255H01L2227/323
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Quick Facts
Patent No.
US 11,626,429
App. No.
17/071,579
Granted
Apr 11, 2023
Kind
B2
Abstract

A display device and method of fabricating the same are provided. The display device includes a substrate and a thin-film transistor formed on the substrate. The thin-film transistor includes a lower gate conductive layer disposed on the substrate, and a lower gate insulating film disposed on the lower gate conductive layer The lower gate insulating film includes an upper surface and sidewalls. The thin-film transistor includes an active layer disposed on the upper surface of the lower gate insulating film, the active layer including sidewalls. At least one of the sidewalls of the lower gate insulating film and at least one of the sidewalls of the active layer are aligned with each other.

Claims (29)

1. A display device comprising:

a substrate;

a thin-film transistor disposed on the substrate, the thin-film transistor including:

a lower gate conductive layer disposed on the substrate;

a lower gate insulating film disposed on the lower gate conductive layer, the lower gate insulating film including an upper surface and sidewalls; and

an active layer disposed on the upper surface of the lower gate insulating film, the active layer including sidewalls, and

a buffer layer disposed between the lower gate conductive layer and the lower gate insulating film, wherein

at least one of the sidewalls of the lower gate insulating film and at least one of the sidewalls of the active layer are aligned with each other, and

an oxygen content of the lower gate insulating film is higher than an oxygen content of the buffer layer.

2. The display device of claim 1 , wherein the active layer completely covers the upper surface of the lower gate insulating film.

3. The display device of claim 1 , wherein the lower gate insulating film is disposed to expose at least a portion of the substrate.

4. The display device of claim 3 , wherein the buffer layer is disposed on an entire surface of the substrate.

5. The display device of claim 4 , wherein

the active layer includes polycrystalline silicon,

the lower gate insulating film includes silicon oxide, and

the buffer layer includes a silicon oxide film.

6. The display device of claim 1 , wherein the thin-film transistor includes:

an upper gate insulating film disposed on the active layer;

an upper gate conductive layer disposed on the upper gate insulating film;

an interlayer insulating film disposed on the upper gate conductive layer;

a first electrode of the thin-film transistor; and

a second electrode of the thin-film transistor.

7. The display device of claim 6 , wherein the first electrode and the second electrode form a conductive layer disposed on the interlayer insulating film.

8. The display device of claim 6 , wherein the active layer includes:

a first doped region;

a second doped region; and

a channel region disposed between the first doped region and the second doped region,

wherein the first electrode and the second electrode of the thin-film transistor are electrically connected to the first doped region and the second doped region, respectively.

9. The display device of claim 8 , wherein a region in which the first electrode of the thin-film transistor is electrically connected to the first doped region and a region in which the second electrode of the thin-film transistor is electrically connected to the second doped region overlap the lower gate insulating film.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 15, 2020
From: KIM, SANG SUB; KIM, KEUN WOO; SHIN, JI YEONG; LEE, YONG SU; CHA, MYOUNG GEUN; CHOI, KI SEOK; CHOI, SANG GUN
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 054090/0333 →
Priority Claims (1)
KR 10-2019-0149743 · Nov 20, 2019 · national
Continuity (1)
Related Publication 20210151475A1 · May 20, 2021