IP Library Granted Patent US 11,626,886
Granted Patent B2
US 11,626,886 · App. 17/382,185 · Granted Apr 11, 2023

Thermometer coding for driving non-binary signals

Inventor: Dragos Dimitriu (Boise, ID)
Assignee: Micron Technology, Inc.
H03M7/165H03M1/0648H03M3/424
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Quick Facts
Patent No.
US 11,626,886
App. No.
17/382,185
Granted
Apr 11, 2023
Kind
B2
Abstract

Methods, systems, and devices for thermometer coding for driving non-binary signals are described. A set of drivers may be used to drive a signal line, with each of the drivers calibrated to have different individual drive strengths. To drive a signal line to successive voltages in accordance with a non-binary modulation scheme, additional individual drivers of the set may be used. The different drive strengths of the individual drivers of the set may scale in non-linear fashion, which may offset non-linearities associated with the individual drivers as additional individual drivers of the set are activated.

Claims (67)

1. An apparatus, comprising:

a memory array configured to store data; and

a driver coupled with the memory array and a signal line, the driver comprising a first driver of a first type, a second driver of the first type, and a third driver of the first type, wherein the driver is configured to transmit signaling via the signal line that is associated with three or more voltages and is based at least in part on the data, and wherein the driver is further configured to:

drive the signal line to a first voltage of the three or more voltages based at least in part on activating the first driver of the first type;

drive the signal line to a second voltage of the three or more voltages based at least in part on activating the second driver of the first type concurrent with the first driver of the first type; and

drive the signal line to a third voltage of the three or more voltages based at least in part on activating the third driver of the first type concurrent with the first driver of the first type and the second driver of the first type.

2. The apparatus of claim 1 , wherein:

to drive the signal line to the first voltage, the driver is configured to activate the first driver of the first type while the second driver of the first type and the third driver of the first type are deactivated; and

to drive the signal line to the second voltage, the driver is configured to activate the first driver of the first type and the second driver of the first type while the third driver of the first type is deactivated.

3. The apparatus of claim 2 , wherein:

to drive the signal line to the first voltage, the driver is configured to activate a first driver of a second type while a second driver of the second type is deactivated;

to drive the signal line to the second voltage, the driver is configured to activate the second driver of the second type while the first driver of the second type is deactivated; and

to drive the signal line to the third voltage, the driver is configured to activate the first driver of the first type, the second driver of the first type, and the third driver of the first type while the first driver of the second type and the second driver of the second type are deactivated.

4. The apparatus of claim 3 , wherein:

to drive the signal line to a fourth voltage of the three or more voltages, the driver is configured to activate the first driver of the second type and the second driver of the second type while the first driver of the first type, the second driver of the first type, and the third driver of the first type are deactivated.

5. The apparatus of claim 1 , further comprising logic circuitry coupled with the driver and configured to:

receive a first input bit and a second input bit; and

generate, based at least in part on the first input bit and the second input bit, a first output signal that indicates whether the first driver of the first type is to be activated, a second output signal that indicates whether the second driver of the first type is to be activated, and a third output signal that indicates whether the third driver of the first type is to be activated.

6. The apparatus of claim 1 , wherein the driver further comprises:

a set of drivers of a second type configured to be operated based at least in part on a binary code comprising a most significant bit and a least significant bit, wherein the first driver of the first type, the second driver of the first type, and the third driver of the first type are configured to be operated based at least in part on a thermometer code corresponding to the binary code.

7. The apparatus of claim 1 , wherein:

the first driver of the first type is configured to have a first output impedance when activated;

the second driver of the first type is configured to have a second output impedance when activated; and

the third driver of the first type is configured to have a third output impedance when activated.

8. The apparatus of claim 7 , wherein a first difference between the first output impedance and the second output impedance is different than a second difference between from the second output impedance and the third output impedance.

9. The apparatus of claim 7 , wherein:

the first output impedance is less than the second output impedance; and

the second output impedance is less than the third output impedance.

10. A method, comprising:

identifying, based at least in part on first data stored within a memory array, a first logic value to indicate via a signal line;

driving, based at least in part on identifying the first logic value, the signal line to a first voltage representative of the first logic value, wherein driving the signal line to the first voltage comprises activating a first driver of a first type;

identifying, based at least in part on second data stored within the memory array, a second logic value to indicate via the signal line;

driving, based at least in part on identifying the second logic value, the signal line to a second voltage representative of the second logic value, wherein driving the signal line to the second voltage comprises activating the first driver of the first type and a second driver of the first type;

identifying, based at least in part on third data stored within the memory array, a third logic value to indicate via the signal line; and

driving, based at least in part on identifying the third logic value, the signal line to a third voltage representative of the third logic value, wherein driving the signal line to the third voltage comprises activating the first driver of the first type, the second driver of the first type, and a third driver of the first type.

11. The method of claim 10 , wherein:

driving the signal line to the first voltage comprises activating the first driver of the first type while the second driver of the first type and the third driver of the first type are deactivated; and

driving the signal line to the second voltage comprises activating the first driver of the first type and the second driver of the first type while the third driver of the first type is deactivated.

12. The method of claim 11 , wherein:

driving the signal line to the first voltage comprises activating a first driver of a second type and the first driver of the first type while a second driver of the second type, the second driver of the first type, and the third driver of the first type are deactivated;

driving the signal line to the second voltage comprises activating the second driver of the second type, the first driver of the first type, and the second driver of the first type while the first driver of the second type and the third driver of the first type are deactivated; and

driving the signal line to the third voltage comprises activating the first driver of the first type, the second driver of the first type, and the third driver of the first type while the first driver of the second type and the second driver of the second type are deactivated.

13. The method of claim 12 , further comprising:

identifying, based at least in part on fourth data stored within the memory array, a fourth logic value to indicate via the signal line; and

driving, based at least in part on identifying the fourth logic value, the signal line to a fourth voltage representative of the fourth logic value, wherein driving the signal line to the fourth voltage comprises activating the first driver of the second type and the second driver of the second type while the first driver of the first type, the second driver of the first type, and the third driver of the first type are deactivated.

14. The method of claim 11 , further comprising:

generating a first thermometer code based at least in part on a first binary code corresponding to the first logic value, wherein activating the first driver of the first type is based at least in part on the first thermometer code;

generating a second thermometer code based at least in part on a second binary code corresponding to the second logic value, wherein activating the first driver of the first type and the second driver of the first type is based at least in part on the second thermometer code; and

generating a third thermometer code based at least in part on a third binary code corresponding to the third logic value, wherein activating the first driver of the first type, the second driver of the first type, and the third driver of the first type is based at least in part on the third thermometer code.

15. The method of claim 14 , further comprising:

activating a first driver of a second type while a second driver of the second type is deactivated based at least in part on the first binary code;

activating the second driver of the second type while the first driver of the second type is deactivated based at least in part on the second binary code; and

refraining from activating the first driver of the second type and the second driver of the second type based at least in part on the third binary code.

16. The method of claim 10 , wherein:

the first driver of the first type is configured to have a first output impedance when activated;

the second driver of the first type is configured to have a second output impedance when activated, the second output impedance different than the first output impedance by a first amount; and

the third driver of the first type is configured to have a third output impedance when activated, the third output impedance different than the second output impedance by a second amount.

17. The method of claim 10 , wherein the first voltage, the second voltage, and the third voltage are included in a set of three or more voltage levels associated with a pulse-amplitude modulation (PAM) scheme.

18. A method, comprising:

operating a first driver of a first type at a first voltage to determine a first strength code for driving a signal line using the first driver of the first type;

operating a second driver of the first type at a second voltage while coupled in parallel with the first driver of the first type to determine a second strength code for driving the signal line using the second driver of the first type; and

operating a third driver of the first type at a third voltage while coupled in parallel with the first driver of the first type and the second driver of the first type to determine a third strength code for driving the signal line using the third driver of the first type.

19. The method of claim 18 , wherein a first difference between the first strength code and the second strength code is different than a second difference between the second strength code and the third strength code.

20. The method of claim 18 , further comprising:

driving the signal line to the first voltage using the first driver of the first type while the second driver of the first type and the third driver of the first type are deactivated;

driving the signal line to the second voltage using the first driver of the first type and the second driver of the first type while the third driver of the first type is deactivated; and

driving the signal line to the third voltage using the first driver of the first type, the second driver of the first type, and the third driver of the first type.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 29, 2022
From: DIMITRIU, DRAGOS
To: MICRON TECHNOLOGY, INC.
Reel/Frame 062235/0930 →
Continuity (1)
Related Publication 20230025764A1 · Jan 26, 2023