IP Library Granted Patent US 11,640,930
Granted Patent B2
US 11,640,930 · App. 16/989,919 · Granted May 2, 2023

Semiconductor package having liquid-cooling lid

Inventors: Chia-Hao Hsu (Hsinchu, TW); Tai-Yu Chen (Hsinchu, TW); Sheng-Liang Kuo (Hsinchu, TW); Bo-Jiun Yang (Hsinchu, TW)
Assignee: MEDIATEK INC.
H01L23/473H01L23/16H01L23/562H01L24/16H01L2224/16227H01L2924/3511
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Quick Facts
Patent No.
US 11,640,930
App. No.
16/989,919
Granted
May 2, 2023
Kind
B2
Abstract

A semiconductor package includes a substrate; a die mounted on a top surface of the substrate in a flip-chip fashion; and a lid mounted on the die and on a perimeter of the substrate. The lid includes a cover plate and four walls formed integral with the cover plate. A liquid-cooling channel is situated between the cover plate of the lid and a rear surface of the die for circulating a coolant relative to the semiconductor package.

Claims (18)

1. A semiconductor package, comprising:

a substrate;

a die mounted on a top surface of the substrate in a flip-chip fashion;

a lid mounted on the die and on a perimeter of the substrate, wherein the lid comprises a cover plate and four walls formed integral with the cover plate, wherein the lid comprises half-etched trenches recessed into a lower surface of the cover plate; and

a liquid-cooling channel situated between the cover plate of the lid and a rear surface of the die for circulating a coolant relative to the semiconductor package.

2. The semiconductor package according to claim 1 , wherein the cover plate is directly secured to the rear surface of the die with an adhesive layer.

3. The semiconductor package according to claim 1 , wherein the liquid-cooling channel is constructed by combining the trenched feature and the rear surface of the die.

4. The semiconductor package according to claim 1 , wherein the coolant in the liquid-cooling channel is in direct contact with the rear surface of the die during operation.

5. The semiconductor package according to claim 1 , wherein the liquid-cooling channel is buried within the cover plate of the lid.

6. The semiconductor package according to claim 5 , wherein the coolant in the liquid-cooling channel is not in direct contact with the rear surface of the die during operation.

7. The semiconductor package according to claim 1 , wherein a liquid inlet and a liquid outlet are provided in the lid, which communicate with the liquid-cooling channel.

8. The semiconductor package according to claim 7 , wherein the liquid inlet and the liquid outlet are disposed in an upper surface of the cover plate.

9. The semiconductor package according to claim 7 , wherein the liquid inlet and the liquid outlet are disposed in at least one of the four walls.

10. The semiconductor package according to claim 7 , wherein the liquid inlet and the liquid outlet are through holes with threaded inner surface.

11. The semiconductor package according to claim 1 , wherein the die is underfilled with an encapsulant material.

12. The semiconductor package according to claim 1 , wherein a plurality of solder balls is disposed on a bottom surface of the substrate.

13. The semiconductor package according to claim 1 , wherein the substrate comprises a packaging substrate.

14. The semiconductor package according to claim 1 , wherein the lid comprises aluminum, copper or an alloy thereof.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 11, 2020
From: HSU, CHIA-HAO; CHEN, TAI-YU; KUO, SHENG-LIANG; YANG, BO-JIUN
To: MEDIATEK INC.
Reel/Frame 053451/0280 →
Continuity (3)
Provisional Application 62991618 · Mar 19, 2020
Provisional Application 62896028 · Sep 5, 2019
Related Publication 20210074608A1 · Mar 11, 2021
Cited By (2)
US 12,243,802 US 12,278,160