IP Library Granted Patent US 11,648,641
Granted Patent B2
US 11,648,641 · App. 16/080,659 · Granted May 16, 2023

Method for polishing silicon substrate and polishing composition set

Inventor: Makoto Tabata (Kiyosu, JP)
Assignee: FUJIMI INCORPORATED
B24B37/11B24B37/00B24B37/08C09G1/02H01L21/02013H01L21/02024H01L21/304
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Quick Facts
Patent No.
US 11,648,641
App. No.
16/080,659
Granted
May 16, 2023
Kind
B2
Abstract

Provided are a method for polishing a silicon substrate according to which PID can be reduced and a polishing composition set usable in the polishing method. The silicon substrate polishing method provided by this invention comprises a stock polishing step and a final polishing step. The stock polishing step comprises several stock polishing sub-steps carried out on one same platen. The several stock polishing sub-steps comprise a final stock polishing sub-step carried out while supplying a final stock polishing slurry P F to the silicon substrate. The total amount of the final stock polishing slurry P F supplied to the silicon substrate during the final stock polishing sub-step has a total weight of Cu and a total weight of Ni, at least one of which being 1 μg or less.

Claims (27)

1. A method for polishing a silicon substrate, the method comprising

a stock polishing step and a final polishing step, wherein:

the stock polishing step comprises several stock polishing sub-steps that are carried out on one same platen;

the several stock polishing sub-steps comprise a final stock polishing sub-step that is carried out while supplying a final stock polishing slurry P F to the silicon substrate;

the total amount of the final stock polishing slurry P F supplied to the silicon substrate during the final stock polishing sub-step has a total weight of Cu and a total weight of Ni, at least one of which being 1 μg or less;

the several stock polishing sub-steps are carried out wherein a time for each stock polishing sub-step is reduced to a time shorter than its preceding step; and

both sides of the silicon substrate are polished simultaneously in each of the several stock polishing sub-steps and one side of the silicon substrate is polished in the final polishing step.

2. The polishing method according to claim 1 , wherein, in the final stock polishing sub-step, the total weight of Cu and the total weight of Ni in the total amount of the final stock polishing slurry P F supplied to the silicon substrate add to a total of 2 μg or less.

3. A method for polishing a silicon substrate, the method comprising a stock polishing step and a final polishing step, wherein:

the stock polishing step comprises several stock polishing sub-steps that are carried out on one same platen;

the several stock polishing sub-steps comprise:

a final stock polishing sub-step that is carried out while supplying a final stock polishing slurry P F to the silicon substrate; and

a non-final stock polishing sub-step that is carried out before the final stock polishing sub-step while supplying a non-final stock polishing slurry P N having a higher concentration of at least Cu or Ni than the concentration of the same element in the final stock polishing slurry P F ;

the several stock polishing sub-steps are carried out wherein a time for each stock polishing sub-step is reduced to a time shorter than its preceding step;

both sides of the silicon substrate are polished simultaneously in each of the several stock polishing sub-steps and one side of the silicon substrate is polished in the final polishing step.

4. The polishing method according to claim 3 , wherein the non-final stock polishing slurry P N has a weight of at least Cu or Ni per 10 g of abrasive contained therein greater than the weight of the same element per 10 g of abrasive contained in the final stock polishing slurry P F .

5. The polishing method according to claim 3 , wherein the final stock polishing slurry P F has a weight of at least Cu or Ni of 0.02 μg or less per 10 g of abrasive contained in the final stock polishing slurry P F .

6. The polishing method according to claim 3 , wherein the final stock polishing slurry P F has a combined weight of Cu and Ni of 0.1 μg or less per 10 g of abrasive contained in the final stock polishing slurry P F .

7. The polishing method according to claim 3 , wherein the non-final stock polishing slurry P N has a combined weight of Cu and Ni per 10 g of abrasive contained therein greater than the combined weight of Cu and Ni per 10 g of the abrasive contained in the final stock polishing slurry P F .

8. The polishing method according to claim 3 , wherein the stock polishing step is carried out on a silicon substrate provided with a hard laser mark.

9. A method for polishing a silicon substrate, the method comprising

a stock polishing step and a final polishing step, wherein:

the stock polishing step comprises several stock polishing sub-steps that are carried out on one same platen;

the several stock polishing sub-steps comprise:

a final stock polishing sub-step that is carried out while supplying a final stock polishing slurry P F to the silicon substrate; and

a non-final stock polishing sub-step that is carried out before the final stock polishing sub-step while supplying a non-final stock polishing slurry P N having a higher concentration of at least Cu or Ni than the concentration of the same element in the final stock polishing slurry P F ; and

both sides of the silicon substrate are polished simultaneously in each of the several stock polishing sub-steps and one side of the silicon substrate is polished in the final polishing step.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 28, 2018
From: TABATA, MAKOTO
To: FUJIMI INCORPORATED
Reel/Frame 046731/0700 →
Priority Claims (1)
JP JP2016-037247 · Feb 29, 2016 · national
Continuity (1)
Related Publication 20190022821A1 · Jan 24, 2019