IP Library › Granted Patent US 11,653,432
Granted Patent B1
US 11,653,432 · App. 17/537,694 · Granted May 16, 2023

Light-emitting diode (LED) driver system with slew-rate control

Inventors: Xianghao Meng (Shanghai, CN); Shangquan Liang (Shanghai, CN)
Assignee: TEXAS INSTRUMENTS INCORPORATED
H05B45/48H05B45/34H05B45/345
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Quick Facts
Patent No.
US 11,653,432
App. No.
17/537,694
Granted
May 16, 2023
Kind
B1
Abstract

One example described herein includes a light-emitting diode (LED) driver system. The system includes an error amplifier configured to compare an input voltage with a reference voltage to generate a control voltage. The system further includes an amplifier output stage configured to control an output current through a first current path and a shunt current through a second current path based on the control voltage. The amplifier output stage comprises a slew-rate controller configured to control a slew-rate of the shunt current. The shunt current can be provided through a shunt resistor in the second current path and added to the output current to provide a total current through an LED string.

Claims (42)

1. A light-emitting diode (LED) driver system comprising:

an error amplifier configured to compare an input voltage with a reference voltage to generate a control voltage; and

an amplifier output stage configured to control an output current through a first current path and a shunt current through a second current path based on the control voltage, the amplifier output stage comprising a slew-rate controller configured to control a slew-rate of the shunt current, the shunt current provided through a shunt resistor in the second current path and added to the output current to provide a total current through an LED string.

2. The system of claim 1 , further comprising:

a first power transistor configured to conduct the output current in the first current path based on a first transistor input voltage; and

a second power transistor configured to conduct the shunt current in the second current path based on a second transistor input voltage.

3. The system of claim 2 , wherein the amplifier output stage comprises:

a first control transistor configured to conduct a first control current based on the control voltage to generate the first transistor input voltage; and

a second control transistor configured to conduct a second control current based on the control voltage to generate the second transistor input voltage.

4. The system of claim 3 , wherein the slew-rate controller is configured to conduct an offset current in parallel with the second control current to generate the second transistor input voltage, the offset current increasing at the slew-rate.

5. The system of claim 4 , wherein the slew-rate controller comprises:

a charging current generator configured to generate a charging current;

a charging capacitor that is charged by a charging current to generate a charging voltage;

a current mirror configured to conduct the offset current based on the charging voltage.

6. The system of claim 1 , wherein the amplifier output stage is configured to increase an amplitude of the shunt current and decrease an amplitude of the output current as the supply voltage increases.

7. The system of claim 1 , wherein the slew-rate controller comprises a charging capacitor having a capacitance that defines the slew-rate of the shunt current.

8. The system of claim 7 , further comprising a power transistor configured to conduct the shunt current in the second current path based on a transistor input voltage, wherein the charging capacitor is configured to generate a charging voltage to control an amplitude of an offset current via a current mirror, wherein the offset current is configured to control the transistor input voltage.

9. The system of claim 8 , wherein the amplifier output stage comprises a control transistor that is controlled by the control voltage, wherein the control transistor is coupled to an input of the power transistor to set an initial amplitude of the transistor input voltage, wherein the offset current is subtracted from the initial amplitude to control the power transistor based on the slew-rate.

10. An integrated circuit (IC) chip comprising the LED driver system of claim 1 .

11. A light-emitting diode (LED) system comprising:

an error amplifier configured to compare an input voltage with a reference voltage to generate a control voltage; and

an amplifier output stage configured to control an output current through a first current path and a shunt current through a second current path based on the control voltage, the amplifier output stage comprising a slew-rate controller configured to control a slew-rate of the shunt current;

a shunt resistor in the second current path to conduct the shunt current; and

an LED string arranged at an output of the first current path and the second current path to illuminate in response to a total current comprising a sum of the output current and the shunt current.

12. The system of claim 11 , wherein the slew-rate controller comprises a charging capacitor having a capacitance that defines the slew-rate of the shunt current.

13. The system of claim 12 , further comprising a power transistor configured to conduct the shunt current in the second current path based on a transistor input voltage, wherein the charging capacitor is configured to generate a charging voltage to control an amplitude of an offset current via a current mirror, wherein the offset current is configured to control the transistor input voltage.

14. The system of claim 13 , wherein the amplifier output stage comprises a control transistor that is controlled by the control voltage, wherein the control transistor is coupled to an input of the power transistor to set an initial amplitude of the transistor input voltage, wherein the offset current is subtracted from the initial amplitude to control the power transistor based on the slew-rate.

15. The system of claim 11 , further comprising:

a first power transistor configured to conduct the output current in the first current path based on a first transistor input voltage; and

a second power transistor configured to conduct the shunt current in the second current path based on a second transistor input voltage;

wherein the amplifier output stage comprises:

a first control transistor configured to conduct a first control current based on the control voltage to generate the first transistor input voltage; and

a second control transistor configured to conduct a second control current based on the control voltage to generate the second transistor input voltage, wherein the slew-rate controller is configured to conduct an offset current in parallel with the second control current to generate the second transistor input voltage, the offset current increasing at the slew-rate.

16. A light-emitting diode (LED) driver system comprising:

a first power transistor comprising an input and an output coupled to an LED string and a shunt resistor;

a second power transistor comprising an input and an output coupled to the shunt resistor;

an error amplifier comprising a first input to receive an input voltage, a second input to receive a reference voltage, and an output to provide a control voltage; and

an amplifier output stage comprising an input coupled to the output of the error amplifier, a first output coupled to the input of the first power transistor, and a second output coupled to the input of the second power transistor, the amplifier output stage comprising a slew-rate controller, the slew-rate controller comprising an output coupled to the input of the second power transistor.

17. The system of claim 16 , wherein the amplifier output stage is configured to control an amplitude of an output current through a first current path that includes the LED string and a shunt current through a second current path that includes the shunt resistor based on the control voltage.

18. The system of claim 17 , wherein the slew-rate controller comprises a charging capacitor having a capacitance that defines the slew-rate of the shunt current.

19. The system of claim 18 , further comprising a power transistor configured to conduct the shunt current in the second current path based on a transistor input voltage, wherein the charging capacitor is configured to generate a charging voltage to control an amplitude of an offset current via a current mirror, wherein the offset current is configured to control the transistor input voltage.

20. The system of claim 19 , wherein the amplifier output stage comprises a control transistor that is controlled by the control voltage, wherein the control transistor is coupled to an input of the power transistor to set an initial amplitude of the transistor input voltage, wherein the offset current is subtracted from the initial amplitude to control the power transistor based on the slew-rate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 10, 2023
From: MENG, XIANGHAO; LIANG, SHANGQUAN
To: TEXAS INSTRUMENTS INCORPORATED
Reel/Frame 062749/0247 →