Semiconductor device

1. A semiconductor device, comprising:

a compound semiconductor layer disposed on a substrate;

a protection layer disposed on the compound semiconductor layer;

a source electrode, a drain electrode and a gate electrode penetrating the protection layer and on the compound semiconductor layer, wherein the gate electrode is disposed between the source electrode and the drain electrode; and

a plurality of field plates disposed over the protection layer and between the gate electrode and the drain electrode, wherein the plurality of field plates are separated from each other, wherein the gate electrode has a non-planar top surface, and the plurality of field plates simultaneously comprising a first field plate of the non-planar top surface and a second field plate of a planar top surface.

2. The semiconductor device as claimed in claim 1 , wherein the gate electrode is separated from the plurality of field plates.

3. The semiconductor device as claimed in claim 1 , wherein the gate electrode and the plurality of field plates are formed of a same metal material layer.

4. The semiconductor device as claimed in claim 1 , wherein the second field plate is between the first field plate and the drain electrode.

5. The semiconductor device as claimed in claim 4 , wherein from a top view, a first longitudinal length of the gate electrode is equal to or smaller than a second longitudinal length of the first field plate.

6. The semiconductor device as claimed in claim 4 , wherein from a top view, the first field plate includes a first portion, a second portion and a third portion between the first portion and the second portion, and opposite ends of the third portion are in connection with the first portion and the second portion respectively, wherein a longitudinal axis of the third portion is parallel with a longitudinal axis of the gate electrode, and a longitudinal axis of the first portion and a longitudinal axis of the second portion are perpendicular to the longitudinal axis of the third portion, and wherein the first portion and the second portion extend toward the source electrode respectively.

7. The semiconductor device as claimed in claim 4 , further comprising a doped compound semiconductor region disposed between the gate electrode and the compound semiconductor layer.

8. The semiconductor device as claimed in claim 1 , wherein the plurality of field plates are in electrical connection with the source electrode.

9. The semiconductor device as claimed in claim 7 , wherein the protection layer comprises a first protection layer and a second protection layer.

10. The semiconductor device as claimed in claim 9 , wherein a bottom surface of the first field plate lands on a top surface of the first protection layer, and a bottom surface of the second field plate lands on a top surface of the second protection layer.

11. The semiconductor device as claimed in claim 9 , wherein a material of the second protection layer is different from a material of the first protection layer.

12. The semiconductor device as claimed in claim 9 , further comprising an interconnection structure disposed over the second protection layer, wherein the first field plate and the second field plate are in electrical connection with the source electrode through the interconnection structure.

13. The semiconductor device as claimed in claim 9 , wherein the gate electrode comprises an upper portion covering the top surface of the second protection layer.

14. The semiconductor device as claimed in claim 9 , wherein the doped compound semiconductor region is embedded in the first protection layer.

15. The semiconductor device as claimed in claim 4 , wherein topmost portions of the gate electrode, the first field plate, and the second field plate are coplanar with each other.