IP Library Granted Patent US 11,664,969
Granted Patent B2
US 11,664,969 · App. 17/548,014 · Granted May 30, 2023

Communication apparatus, method of controlling communication apparatus, and storage medium

Inventor: Mitsumasa Abe (Kanagawa, JP)
Assignee: Canon Kabushiki Kaisha
H04L7/0037H04J3/0667H04L7/0012
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Quick Facts
Patent No.
US 11,664,969
App. No.
17/548,014
Granted
May 30, 2023
Kind
B2
Abstract

A communication apparatus includes a first counter configured to synchronize with a reference time, a second counter configured to synchronize with the first counter, a generation unit configured to generate a synchronization signal each time when a value of the second counter is incremented by a predetermined number, a correction unit configured to correct the value of the second counter toward a value of the first counter, and a control unit configured to control the correction unit to cause the correction unit to calculate a difference between the value of the first counter and the value of the second counter and, in a case where the calculated difference is greater than a predetermined threshold value, the correction unit to correct the value of the second counter step by step.

Claims (29)

1. A communication apparatus comprising:

a first counter configured to synchronize with a reference time;

a second counter configured to synchronize with the first counter;

at least one processor and at least one memory coupled to the processor and having stored thereon instructions that, when executed by the processor, cause the processor to perform operations comprising:

generating a synchronization signal each time when a value of the second counter is incremented by a predetermined number;

correcting the value of the second counter toward a value of the first counter; and

wherein, in a case where a difference between the value of the first counter and the value of the second counter is greater than a predetermined threshold value, controlling the value of the second counter to be corrected step by step,

wherein in a case where the second counter is ahead of the first counter, the second counter is decremented to negatively correct the second counter.

2. The communication apparatus according to claim 1 , wherein in a case where the difference is greater than the predetermined threshold value, a value less than or equal to the predetermined threshold value is set as a correction value and corrects the value of the second counter.

3. The communication apparatus according to claim 1 , wherein in a case where the difference is greater than the predetermined threshold value, a value less than the predetermined threshold value is set as a correction value and corrects the value of the second counter.

4. The communication apparatus according to claim 1 , wherein in a case where the difference is less than or equal to the predetermined threshold value, the difference is set as a correction value and corrects the value of the second counter.

5. The communication apparatus according to claim 1 , wherein a maximum phase error below which an operation of clock synchronization of a counterpart apparatus that is an output destination of the synchronization signal is ensured, is set as the predetermined threshold value.

6. The communication apparatus according to claim 1 , wherein a pulse that is output from the first counter and is for a timing to update the second counter, is adjusted to avoid temporally overlapping of the pulse with a pulse of the synchronization signal.

7. The communication apparatus according to claim 1 , wherein an externally input pulse for a timing to update the first counter is adjusted to avoid temporally overlapping of the pulse with at least one of a pulse for a timing to update the second counter and a pulse for the synchronization signal.

8. The communication apparatus according to claim 1 , wherein the predetermined threshold value is set to a value with which a pulse of the synchronization signal falls within a range of a timing during which a counterpart apparatus that is an output destination of the synchronization signal is ready to receive the synchronization signal.

9. The communication apparatus according to claim 1 , wherein in a case where the second counter is ahead of the first counter, the second counter is stopped to negatively correct the second counter.

10. The communication apparatus according to claim 9 , further comprising a wait counter configured to hold a period of stopping the second counter,

wherein the second counter is stopped by decrementing the wait counter.

11. The communication apparatus according to claim 1 , wherein the communication apparatus executes clock synchronization using the Precision Time Protocol (PTP) defined by the Institute of Electrical and Electronics Engineers (IEEE) 1588 standard.

12. A method of controlling a communication apparatus, the method comprising:

generating a synchronization signal each time when a value of a second counter synchronized with a first counter synchronized with a reference time is incremented by a predetermined number;

calculating a difference between a value of the first counter and the value of the second counter; and

correcting, in a case where the calculated difference is greater than a predetermined threshold value, the value of the second counter step by step toward the value of the first counter,

wherein in a case where the second counter is ahead of the first counter, decrementing the second counter to negatively correct the second counter.

13. A non-transitory computer-readable storage medium storing a program that causes a computer to execute a method of controlling a communication apparatus, the method comprising:

generating a synchronization signal each time when a value of a second counter synchronized with a first counter synchronized with a reference time is incremented by a predetermined number;

calculating a difference between a value of the first counter and the value of the second counter; and

correcting, in a case where the calculated difference is greater than a predetermined threshold value, the value of the second counter step by step toward the value of the first counter,

wherein in a case where the second counter is ahead of the first counter, decrementing the second counter to negatively correct the second counter.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 7, 2022
From: ABE, MITSUMASA
To: CANON KABUSHIKI KAISHA
Reel/Frame 058915/0987 →
Priority Claims (1)
JP JP2020-209640 · Dec 17, 2020 · national
Continuity (1)
Related Publication 20220200779A1 · Jun 23, 2022