Interconnect structure
A semiconductor structure and the manufacturing method thereof are disclosed. An exemplary semiconductor structure includes a source/drain (S/D) feature formed in an interlayer dielectric layer (ILD), a S/D contact via electrically connected to the S/D feature, a metal feature formed over the S/D contact via, and a metal line formed over the metal feature and electrically connected to the S/D contact via. The metal line is formed of a material different from that of the S/D contact via, and the S/D contact via is spaced apart from the metal line. By providing the metal feature, electromigration between the metal line and the contact via may be advantageously reduced or substantially eliminated.
1. A semiconductor structure, comprising:
a substrate having a source/drain feature;
a dielectric layer over the substrate;
a source/drain contact via extending through the dielectric layer and electrically connected to the source/drain feature, wherein the source/drain contact via is formed of a first material, and wherein a top surface of the source/drain contact via is coplanar with a top surface of the dielectric layer;
a metal feature over the source/drain contact via, wherein the metal feature is formed of a second material different from the first material; and
a metal line over the metal feature and electrically connected to the source/drain contact via, wherein the metal line is formed of a third material different from the second material, wherein a portion of a bottom surface of the metal line directly contacts the metal feature, and another portion of the bottom surface of the metal line directly contacts the dielectric layer, and
wherein the source/drain contact via is spaced apart from the metal line by the metal feature.
2. The semiconductor structure of claim 1 , wherein a bottom surface of the metal feature directly contacts the top surface of the source/drain contact via.
3. The semiconductor structure of claim 1 , wherein a shape of a top surface of the metal feature comprises a convex shape.
4. The semiconductor structure of claim 1 , wherein the source/drain contact via comprises a glue layer and a metal fill material over the glue layer.
5. The semiconductor structure of claim 1 , wherein a bottom surface of the metal feature further covers a portion of the top surface of the dielectric layer.
6. The semiconductor structure of claim 1 , wherein the metal feature is a first metal feature, the metal line is a first metal line, the semiconductor structure further comprises:
a gate structure formed over the substrate and adjacent to the source/drain feature;
a gate contact via extending through the dielectric layer and electrically connected to the gate structure; and
a second metal feature disposed between a second metal line and the gate contact via, the second metal line being electrically connected to the gate contact via,
wherein the gate contact via is spaced apart from the second metal line.
7. The semiconductor structure of claim 1 , wherein the second material comprises ruthenium, molybdenum, copper, cobalt, or tungsten.
8. The semiconductor structure of claim 1 , wherein the metal line comprises:
a barrier layer over the metal feature, wherein the barrier layer is formed of a fourth material different from the second material; and
a metal fill layer over the barrier layer.
9. The semiconductor structure of claim 8 , wherein a resistivity of the second material is less than a resistivity of the fourth material.
10. The semiconductor structure of claim 1 , wherein the source/drain feature is a drain feature, the dielectric layer is a first dielectric layer, the source/drain contact via is a frontside drain contact via, and the metal feature is a first metal feature, the semiconductor structure further comprises:
a source feature;
a second dielectric layer below the source feature;
a backside source contact via extending through the second dielectric layer and electrically connected to the source feature;
a second metal feature below the backside source contact via; and
a backside power rail below the second metal feature and electrically connected to the frontside drain contact via,
wherein the backside source contact via is spaced apart from the backside power rail.
11. A semiconductor structure, comprising:
a transistor formed over a substrate;
a contact via electrically coupled to the transistor;
a metal cap on the contact via; and
a metal line on the metal cap, wherein an entirety of the metal cap is embedded in the metal line,
wherein a composition of the metal cap is different from a composition of the contact via and a composition of the metal line, and
wherein the metal cap is disposed vertically between the metal line and the contact via.
12. The semiconductor structure of claim 11 ,
wherein the transistor comprises a source feature, and the contact via is disposed over and electrically coupled to the source feature.
13. The semiconductor structure of claim 11 ,
wherein the transistor comprises a gate structure, and the contact via is disposed over and electrically coupled to the gate structure.
14. The semiconductor structure of claim 11 ,
wherein a bottom surface of the metal cap spans a first width along a first direction, a top surface of the contact via spans a second width along the first direction, and a bottom surface of the metal line spans a third width along the first direction,
wherein the first width is greater than the second width and is less than the third width.
15. A semiconductor structure, comprising:
a substrate having a transistor;
a contact via extending through a dielectric layer over the transistor, wherein the contact via is electrically connected to the transistor;
a barrier layer over the contact via and the dielectric layer;
a metal fill layer over the barrier layer; and
a conductive cap feature disposed between the contact via and the barrier layer, wherein the contact via is spaced apart from the barrier layer, wherein an interface of the conductive cap feature and the contact via is coplanar with a portion of a bottom surface of the barrier layer, and
wherein the barrier layer is formed of a first material, and the conductive cap feature is formed of a second material, a resistivity of the second material is less than a resistivity of the first material.
16. The semiconductor structure of claim 15 , wherein the barrier layer directly contacts a top surface of the conductive cap feature and a portion of the top surface of the dielectric layer.
17. The semiconductor structure of claim 15 , wherein the contact via comprises a glue layer and a metal fill material over the glue layer.
18. The semiconductor structure of claim 15 , further comprising:
a source/drain contact layer over a source/drain feature of the transistor,
wherein the contact via is electrically connected to the source/drain contact layer.
19. The semiconductor structure of claim 18 , further comprising:
a self-aligned contact dielectric (SAC) feature over the source/drain contact layer, wherein the contact via further extends through the SAC feature and directly contacts the source/drain contact layer.
20. The semiconductor structure of claim 15 , wherein the contact via comprises cobalt, the metal fill layer comprises ruthenium, and the conductive cap feature comprises tungsten.