IP Library Granted Patent US 11,675,747
Granted Patent B2
US 11,675,747 · App. 16/926,106 · Granted Jun 13, 2023

System and method for early tail-release in a log structure log using multi-line PLB structure supporting multiple partial transactions

Inventors: Ronen Gazit (Tel Aviv, IL); Vladimir Shveidel (Pardes-Hana, IL); Anton Kucherov (Dudley, MA); Amitai Alkalay (Kadima, IL)
Assignee: EMC IP Holding Company, LLC
G06F16/1865G06F12/0246G06F12/0882G06F12/0891G06F16/1734G06F16/278
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Quick Facts
Patent No.
US 11,675,747
App. No.
16/926,106
Granted
Jun 13, 2023
Kind
B2
Abstract

A method, computer program product, and computer system for obtaining, by a computing device, one or more pages from a log to complete a write transaction. Parity of a line in a multi-line physical layer block may be calculated. The one or more pages may be written to the line in the multi-line physical layer block. The parity to the line may be written in the multi-line physical layer block. A bitmap associated with the physical layer block may be updated based upon, at least in part, writing the one or more pages and the parity to the line in the multi-line physical layer block.

Claims (35)

1. A computer-implemented method comprising:

obtaining, by a computing device, one or more pages from a log to complete a write transaction;

calculating parity of a line in a multi-line physical layer block where each write transaction is independent and protected by the parity of the line in the multi-line physical layer block such that writing one or more subsequent write transactions to the multi-line physical layer block does not update a previous write transaction;

writing the one or more pages to the line in the multi-line physical layer block;

writing the parity to the line in the multi-line physical layer block; and

updating a bitmap associated with the multi-line physical layer block based upon, at least in part, writing the one or more pages and the parity to the line in the multi-line physical layer block.

2. The computer-implemented method of claim 1 further comprising invalidating the one or more pages in the log.

3. The computer-implemented method of claim 2 further comprising updating a tail location in the log to a last non-written page.

4. The computer-implemented method of claim 3 wherein the tail location is updated after completing the write transaction to the line.

5. The computer-implemented method of claim 1 wherein the multi-line physical layer block is a physical layer block matrix which is composed by augmenting a physical layer block.

6. The computer-implemented method of claim 1 wherein the multi-line physical layer block supports multiple partial transactions.

7. The computer-implemented method of claim 1 wherein the one or more pages are split between the line in the multi-line physical layer block.

8. A computer program product residing on a computer readable storage medium having a plurality of instructions stored thereon which, when executed across one or more processors, causes at least a portion of the one or more processors to perform operations comprising:

obtaining one or more pages from a log to complete a write transaction;

calculating parity of a line in a multi-line physical layer block where each write transaction is independent and protected by the parity of the line in the multi-line physical layer block such that writing one or more subsequent write transactions to the multi-line physical layer block does not update a previous write transaction;

writing the one or more pages to the line in the multi-line physical layer block;

writing the parity to the line in the multi-line physical layer block; and

updating a bitmap associated with the multi-line physical layer block based upon, at least in part, writing the one or more pages and the parity to the line in the multi-line physical layer block.

9. The computer program product of claim 8 wherein the operations further comprise invalidating the one or more pages in the log.

10. The computer program product of claim 9 wherein the operations further comprise updating a tail location in the log to a last non-written page.

11. The computer program product of claim 10 wherein the tail location is updated after completing the write transaction to the line.

12. The computer program product of claim 8 wherein the multi-line physical layer block is a physical layer block matrix which is composed by augmenting a physical layer block.

13. The computer program product of claim 8 wherein the multi-line physical layer block supports multiple partial transactions.

14. The computer program product of claim 8 wherein the one or more pages are split between the line in the multi-line physical layer block.

15. A computing system including one or more processors and one or more memories configured to perform operations comprising:

obtaining one or more pages from a log to complete a write transaction;

calculating parity of a line in a multi-line physical layer block where each write transaction is independent and protected by the parity of the line in the multi-line physical layer block such that writing one or more subsequent write transactions to the multi-line physical layer block does not update a previous write transaction;

writing the one or more pages to the line in the multi-line physical layer block;

writing the parity to the line in the multi-line physical layer block; and

updating a bitmap associated with the physical layer block based upon, at least in part, writing the one or more pages and the parity to the line in the multi-line physical layer block.

16. The computing system of claim 15 wherein the operations further comprise invalidating the one or more pages in the log.

17. The computing system of claim 16 wherein the operations further comprise updating a tail location in the log to a last non-written page.

18. The computing system of claim 17 wherein the tail location is updated after completing the write transaction to the line.

19. The computing system of claim 15 wherein the multi-line physical layer block is a physical layer block matrix which is composed by augmenting a physical layer block, and wherein the multi-line physical layer block supports multiple partial transactions.

20. The computing system of claim 15 wherein the one or more pages are split between the line in the multi-line physical layer block.

Assignments (9)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053574/0221) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060333/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053578/0183) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060332/0864 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (053573/0535) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 060333/0106 →
RELEASE OF SECURITY INTEREST AT REEL 053531 FRAME 0108 Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 058001/0371 →
SECURITY INTEREST Recorded Aug 21, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 053578/0183 →
SECURITY INTEREST Recorded Aug 21, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 053573/0535 →
SECURITY INTEREST Recorded Aug 21, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 053574/0221 →
SECURITY AGREEMENT Recorded Aug 18, 2020
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 053531/0108 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 10, 2020
From: GAZIT, RONEN; SHVEIDEL, VLADIMIR; KUCHEROV, ANTON; ALKALAY, AMITAI
To: EMC IP HOLDING COMPANY, LLC
Reel/Frame 053176/0833 →
Continuity (1)
Related Publication 20220012215A1 · Jan 13, 2022
Cited By (1)
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