Micro-LED display

1. A display device comprising:

a display substrate including an array of micro-LEDs that form individual pixels; and

a backplane substrate including a plurality of pixel logic hardware modules and control logic, each pixel logic hardware module including a local memory element including a plurality of memory cells configured to store a multi-bit pixel intensity value of a corresponding pixel for an image frame and a redundant memory cell, wherein the control logic is configured to 1) determine that a memory cell of the plurality of memory cells is a degraded memory cell and 2) write a bit of the multi-bit pixel intensity value to the redundant memory cell instead of the degraded memory cell based on said determining, and

wherein the backplane substrate is bonded to a backside of the display substrate such that the pixel logic hardware modules are physically aligned behind the array of micro-LEDs, and wherein each pixel logic hardware module is electrically connected to a corresponding micro-LED.

2. The display device of claim 1 , wherein the backplane substrate includes control logic configured to individually control an intensity of each micro-LED of the array according to a drive scheme that defines a field time frame in which the display device visually presents the image frame, wherein the drive scheme dictates that a micro-LED be driven by a drive signal that is modulated based on the multi-bit pixel intensity value stored in the local memory element corresponding to the pixel formed by the micro-LED for a pulse width modulation cycle that is repeated at a frequency of at least two modulation cycles per the field time frame.

3. The display device of claim 2 , wherein the field time frame includes a local update sub-frame and a modulation sub-frame, wherein during the local update sub-frame the control logic is configured to write the multi-bit pixel intensity value for the image frame to the local memory element, and wherein during the pixel modulation sub-frame the control logic is configured to drive the micro-LED based on the drive signal.

4. The display device of claim 2 , wherein the drive scheme dictates that the drive signal is modulated for a pulse width modulation cycle that is repeated at a frequency of more than two cycles per the field time frame.

5. The display device of claim 2 , wherein each micro-LED is configured to operate in a current mode in which a change in current of the drive signal causes a linear change in intensity of the micro-LED.

6. The display device of claim 2 , wherein the backplane substrate includes a plurality of current mirror circuits electrically connected to the array of micro-LEDs, and wherein the control logic is configured to adjust a global intensity of the array of micro-LEDs by adjusting a bias current of the plurality of current mirror circuits.

7. The display device of claim 2 , wherein the backplane substrate includes a plurality of current mirror circuits electrically connected to a plurality of different regions of micro-LEDs of the array, and wherein the control logic is configured to adjust a regional intensity of a selected region of micro-LEDs by adjusting a bias current of a current mirror circuit corresponding to the selected region.

8. The display device of claim 1 , wherein the local memory element is a first local memory element, wherein the image frame is a first image frame, and wherein each pixel logic hardware module further includes a second local memory element configured to store a pixel intensity value of a corresponding micro-LED for a second image frame that is visually presented by the display device subsequent to the first image frame.

9. The display device of claim 1 , wherein the local memory element includes a static random-access memory (SRAM) element.

10. The display device of claim 9 , wherein the SRAM element is configured to store a 12-bit pixel intensity value.

11. The display device of claim 1 , wherein the local memory element is configured to write the multi-bit pixel intensity value into the plurality of memory cells serially.

12. The display device of claim 1 , wherein each pixel defines a physical footprint, and each pixel logic hardware module is sized and aligned to fit within the physical footprint of the corresponding pixel.

13. A method for controlling a display device including an array of micro-LEDs that form individual pixels and a plurality of pixel logic hardware modules positioned proximate to corresponding micro-LEDs of the array of micro-LEDs, each pixel logic hardware module including a local memory element including a plurality of memory cells and a redundant memory cell, the method comprising:

for each micro-LED of the array,

determining if a memory cell of the plurality of memory cells is a degraded memory cell;

based on determining that none of the plurality of memory cells is a degraded memory cell, during a local update sub-frame of a field time frame designated to visually present an image frame, writing a multi-bit pixel intensity value for the image frame to the local memory element of the pixel logic hardware module corresponding to the micro-LED;

based on determining that a memory cell of the plurality of memory cells is a degraded memory cell, during the local update sub-frame of the field time frame designated to visually present the image frame, writing a bit of the multi-bit pixel intensity value to the redundant memory cell instead of the degraded memory cell based on said determining; and

during a pixel modulation sub-frame of the field time frame, driving the micro-LED with a drive signal that is based on the multi-bit pixel intensity value for a pulse width modulation cycle that is repeated at a frequency of at least two pulse modulation cycles per the field time frame.

14. The method of claim 13 , wherein the multi-bit pixel intensity value is written into the plurality of memory cells serially.

15. The method of claim 13 , wherein the pulse width modulation cycle is repeated at a frequency of more than two modulation cycles per the field time frame.

16. The method of claim 13 , wherein the display device includes a plurality of current mirror circuits electrically connected to the array of micro-LEDs, and wherein the method further comprises adjusting a global intensity of the array of micro-LEDs by adjusting a bias current of the plurality of current mirror circuits.

17. The method of claim 13 , wherein the display device includes a plurality of current mirror circuits electrically connected to a plurality of different regions of micro-LEDs of the array, and wherein the method further comprises adjusting a regional intensity of a selected region of micro-LEDs by adjusting a bias current of a current mirror circuit corresponding to the selected region.

18. A display device comprising:

an array of micro-LEDs forming individual pixels;

a plurality of pixel logic hardware modules positioned proximate to corresponding micro-LEDs of the array of micro-LEDs, each pixel logic hardware module including a first local memory element and a second local memory element, wherein the first local memory element is configured to store a multi-bit pixel intensity value of a corresponding micro-LED for a first image frame, wherein the second local memory element is configured to store a multi-bit intensity value of the corresponding micro-LED for a second image frame that is visually presented by the display device subsequent to the first image frame, and each pixel logic hardware module being electrically connected to a corresponding micro-LED; and

control logic configured to control an intensity of each micro-LED of the array according to a drive scheme that defines a first field time frame in which the display device visually presents the first image frame and a second field time frame in which the display device visually presents the second image frame.