IP Library Granted Patent US 11,714,767
Granted Patent B1
US 11,714,767 · App. 17/565,859 · Granted Aug 1, 2023

DMA mechanism with inline data services

Inventors: Roii Goldstein (Beit Dagan, IL); Ofer Hayut (Rosh Pina, IL); Roy Geron (Beit Izchaq, IL)
Assignee: LIGHTBITS LABS LTD.
G06F13/28G06F3/0604G06F3/064G06F3/0679
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Quick Facts
Patent No.
US 11,714,767
App. No.
17/565,859
Granted
Aug 1, 2023
Kind
B1
Abstract

A system and method for performing a combined storage operation, the method including using a direct memory access (DMA) controller to obtain a modified DMA command, wherein the modified DMA command includes parameters of a data manipulation and one of a user read command or a user write command; retrieve data according to the user read command or the user write command; manipulate the data according to the parameters of a data manipulation, inline with the user read command or the user write command; and transmit the manipulated data according to the user read command or the user write command.

Claims (26)

1. A method for combining direct memory access (DMA) operations and data services, the method comprising:

obtaining a joint data transfer command, wherein the joint data transfer command comprises at least one parameter of a data transfer and at least one parameter of a manipulation to be applied on the transferred data, wherein the joint data transfer command comprises an error correction command to restore lost data, wherein each of the at least one parameter of the data transfer comprise an error correction (EC) member defining a chunk of data and wherein each of the at least one parameter of the manipulation comprises a Galois coefficient associated with each of the at least one EC member;

transferring the data according to the at least one parameter of the data transfer; and

while transferring the data, manipulating the data according to the at least one parameter of the manipulation, wherein manipulating comprises multiplying each of the EC members by the associated Galois coefficient and adding the multiplication results to restore the lost data.

2. The method of claim 1 , wherein the joint data transfer command comprises a scatter gather list (SGL) modified to comprise the parameters of the data manipulation.

3. A method for performing a combined storage operation, the method comprising, using a direct memory access (DMA) controller:

obtaining a modified DMA command, wherein the modified DMA command comprises an error correction command and parameters of the error correction command;

retrieving multiple chunks of data according to the parameters of the error correction command;

performing operations on the retrieved multiple chunks of data according to the parameters of the error correction command to restore lost data, inline with the error correction command; and

transmitting the manipulated data according to the error correction command.

4. The method of claim 3 , wherein the modified DMA command comprises a scatter gather list (SGL) modified to comprise the parameters of the error correction command.

5. A direct memory access (DMA) controller comprising:

logic to obtain a modified DMA command from a host processor, wherein the modified DMA command comprises an error correction command and parameters of the error correction command;

logic to retrieve multiple chunks of data according to the parameters of the error correction command;

logic to perform operations on the retrieved multiple chunks of data according to the parameters of the error correction command to restore lost data, inline with the error correction command; and

logic to transmit the manipulated data according to the error correction command.

6. The DMA controller of claim 5 , wherein the error correction command complies with Redundant Array of Independent Disks (RAID) 6 configuration.

7. The DMA controller of claim 5 , wherein the modified DMA command comprises a scatter gather list (SGL) modified to comprise the parameters of the error correction command.

8. The DMA controller of claim 5 , wherein DMA controller is implemented in hardware.

9. The method of claim 1 , wherein the error correction command complies with Redundant Array of Independent Disks (RAID) 6 configuration.

10. The method of claim 1 , wherein more than one Galois coefficient is associated with each of the at least one EC member, wherein each of the more than one Galois coefficient is used for restoring a different chunk of lost data.

11. The method of claim 3 , wherein the error correction command complies with Redundant Array of Independent Disks (RAID) 6 configuration.

12. The method of claim 3 , wherein the parameters of the error correction command comprise at least one error correction (EC) member defining a chunk of data and at least one associated Galois coefficient.

13. The method of claim 3 , wherein the parameters of the error correction command comprise at least one error correction (EC) member defining a chunk of data and more than one Galois coefficient associated with each of the at least one EC member, wherein each of the more than one Galois coefficient is used for restoring a different chunk of lost data.

14. The DMA controller of claim 5 , wherein the parameters of the error correction command comprise at least one error correction (EC) member defining a chunk of data and at least one associated Galois coefficient.

15. The DMA controller of claim 5 , wherein the parameters of the error correction command comprise at least one error correction (EC) member defining a chunk of data and more than one Galois coefficient associated with each of the at least one EC member, wherein each of the more than one Galois coefficient is used for restoring a different chunk of lost data.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 30, 2022
From: GOLDSTEIN, ROII; HAYUT, OFER; GERON, ROY
To: LIGHTBITS LABS LTD.
Reel/Frame 058821/0096 →
Cited By (6)
US 12,499,040 US 12,541,451 US 12,619,380 US 12,645,397 US 12,657,093 US 12,711,057