IP Library Granted Patent US 11,790,873
Granted Patent B2
US 11,790,873 · App. 17/887,177 · Granted Oct 17, 2023

Correction for defective memory of a memory-in-pixel display

Inventors: Stanley Bo-Ting Wang (Cupertino, CA); Derek Keith Shaeffer (Redwood City, CA); Ivan Knez (San Jose, CA); Jose Antonio Dominguez-Caballero (San Jose, CA); Tien-Chien Kuo (Sunnyvale, CA)
Assignee: Apple Inc.
G09G5/399G09G3/32G09G5/393G09G5/395G09G2320/064G09G2320/0646G09G2330/08G09G2330/12
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Quick Facts
Patent No.
US 11,790,873
App. No.
17/887,177
Granted
Oct 17, 2023
Kind
B2
Abstract

An electronic display may include a pixel circuit. The pixel circuit may include memory storage to store data values representative of image data to be depicted via the pixel circuit. The memory storage may also include memory components for storing bits of the data value. The pixel circuit may also include a light-emitting device for emitting light based at least in part on the data value and a controller. The controller may receive the data value and store the bits based on a mapping between the bits and the memory components. The mapping may be determined based on routing one or more of the bits associated with one or more defective memory components of the memory components to one or more other memory components of the memory components. The controller may also drive the light-emitting device to emit light based on the bits stored in accordance with the mapping.

Claims (49)

1. An electronic device comprising:

a pixel circuit comprising:

a plurality of memory components; and

a light-emitting device configured to emit light based on a data value representative of a portion of an image frame to be depicted via the pixel circuit; and

processing circuitry configured to:

receive an indication of one or more defective memory components of the plurality of memory components at least in part by:

receiving test data corresponding to the plurality of memory components;

loading the plurality of memory components with the test data;

receiving sensed data obtained while the plurality of memory components is loaded with the test data; and

identifying the one or more defective memory components based on the sensed data;

generate a mapping based on the one or more defective memory components, wherein the mapping corresponds to a routing of one or more of a plurality of bits of the data value to one or more functional memory components of the plurality of memory components; and

store the mapping in memory.

2. The electronic device of claim 1 , wherein the processing circuitry is configured to:

receive the mapping from the memory; and

transmit one or more write control signals to cause the pixel circuit to store each bit of the plurality of bits of the data value in the one or more functional memory components of the plurality of memory components based on the mapping.

3. The electronic device of claim 2 , wherein the processing circuitry is configured to transmit one or more read control signals to cause the pixel circuit to output each bit of the plurality of bits of the data value from the one or more functional memory components of the plurality of memory components based on the mapping.

4. The electronic device of claim 1 , wherein the data value corresponds to a number of bits, and wherein the plurality of memory components equals in number to the number of bits.

5. The electronic device of claim 1 , wherein the sensed data corresponds to optical data generated while an additional image frame corresponding to the test data is presented via a plurality of pixel circuits comprising the pixel circuit.

6. The electronic device of claim 1 , wherein the sensed data corresponds to an electrical signal sensed while the plurality of memory components is loaded with the test data.

7. The electronic device of claim 1 , wherein the routing is configured to avoid storing a most significant bit of the plurality of bits in the defective memory components.

8. The electronic device of claim 1 , wherein the mapping is configured to cause disabling of a portion of an output of a counter.

9. The electronic device of claim 1 , wherein the processing circuitry is configured to disable an output of a counter based on the mapping.

10. A method comprising:

receiving an indication of one or more defective memory components of a plurality of memory components and one or more functional memory components of the plurality of memory components at least in part by:

receiving test data corresponding to the plurality of memory components;

loading the plurality of memory components with the test data;

receiving sensed data obtained based on the plurality of memory components being loaded with the test data; and

determining the one or more defective memory components based on the sensed data;

generating a mapping based on the one or more defective memory components, wherein the mapping corresponds to a routing of one or more of a plurality of bits of a data value to the one or more functional memory components; and

storing the mapping in memory separate from the plurality of memory components.

11. The method of claim 10 , wherein the routing comprises an association of a most significant bit of the plurality of bits to one of the one or more functional memory components bypassing one of the one or more defective memory components.

12. The method of claim 10 , comprising:

receiving the mapping from the memory; and

transmitting one or more write control signals to cause a pixel circuit to store each bit of the plurality of bits of the data value in the one or more functional memory components of the plurality of memory components based on the mapping.

13. The method of claim 12 , comprising transmitting one or more read control signals to cause the pixel circuit to output each bit of the plurality of bits of the data value from the one or more functional memory components of the plurality of memory components based on the mapping.

14. The method of claim 10 , wherein the sensed data comprises optical data generated while an image frame is presented via a plurality of pixel circuits based on the test data, and wherein the plurality of pixel circuits comprise the pixel circuit.

15. The method of claim 10 , wherein the sensed data comprises an electrical signal sensed while the plurality of memory components is loaded with the test data.

16. The method of claim 10 , wherein the mapping is configured to cause disabling of a portion of an output of a counter.

17. An electronic device comprising:

a pixel circuit comprising:

a plurality of memory components; and

a light-emitting device configured to emit light based on a data value representative of a portion of an image frame to be depicted via the pixel circuit; and

processing circuitry configured to:

receive a mapping corresponding to a routing of one or more of a plurality of bits of the data value to one or more memory components of the plurality of memory components, wherein the mapping is determined based on one or more defective memory components of the plurality of memory components;

transmit one or more write control signals to the pixel circuit to cause the pixel circuit to store each bit of the plurality of bits of the data value in the one or more memory components of the plurality of memory components based on the mapping; and

disable an output of a counter configured to enable access to the one or more defective memory components of the plurality of memory components based at least in part on the mapping.

18. The electronic device of claim 17 , wherein the one or more memory components correspond to one or more spare memory components.

19. The electronic device of claim 18 , wherein the one or more write control signals are configured to cause the pixel circuit to route a bit of the plurality of bits from one of the one or more defective memory components of the plurality of memory components to one of the one or more memory components based on a position of one of the one or more defective memory components.

20. The electronic device of claim 17 , wherein disabling the output of the counter comprises setting the output of the counter to a defined voltage value.

Continuity (4)
Continuation 17224939 · Apr 7, 2021
Continuation 16502848 · Jul 3, 2019
Provisional Application 62732321 · Sep 17, 2018
Related Publication 20230029501A1 · Feb 2, 2023