High electron mobility transistor and high electron mobility transistor forming method
A high electron mobility transistor (HEMT) and method for forming the same are disclosed. The high electron mobility transistor has a GaN epi-layer, a source ohmic contact, a drain ohmic contact, a gate structure, a first metal electrode contact and a first passivation layer. The source ohmic contact and the drain ohmic contact are disposed on the epi-layer. The gate structure is disposed on the epi-layer and between the source ohmic contact and the drain ohmic contact. The first metal electrode contact is disposed above the gate structure. The first passivation layer is sandwiched between the first metal electrode contact and the gate structure.
1. A high electron mobility transistor (HEMT), comprising:
a GaN epi-layer;
a source ohmic contact disposed on the epi-layer;
a drain ohmic contact disposed on the epi-layer;
a gate structure disposed on the epi-layer and between the source ohmic contact and the drain ohmic contact;
a first metal electrode contact disposed above the gate structure; and
a first passivation layer fully covering the gate structure and sandwiched between the first metal electrode contact and the gate structure.
2. The high electron mobility transistor as claimed in claim 1 , wherein the first passivation layer can be an AlN layer, an InAlN layer, an AlGaN layer, a SiO 2 layer, an Al 2 O 3 layer, a SiN layer, a HfO 2 layer, a TiO 2 layer, or a Ga 2 O 3 layer, or a combination of two of the above-mentioned layers.
3. The high electron mobility transistor as claimed in claim 1 , wherein a thickness of the first passivation layer sandwiched between the first metal electrode contact and the gate structure is less than 10 nm.
4. The high electron mobility transistor as claimed in claim 1 , wherein the gate structure is a p-type GaN, an n-type GaN, an InGaN, or an AlGaN.
5. The high electron mobility transistor as claimed in claim 1 , wherein the gate structure has two side walls and a thickness of the first passivation layer sandwiched between the first metal electrode contact and the gate structure is not thicker than a thickness of the first passivation layer deposited on the two side walls.
6. The high electron mobility transistor as claimed in claim 1 , further comprising a second passivation layer deposited on top of the first passivation layer in addition to the first passivation layer sandwiched between the first metal electrode contact and the gate structure.
7. The high electron mobility transistor as claimed in claim 6 , further comprising a third passivation layer deposited on top of the second passivation layer.