IP Library Granted Patent US 11,804,441
Granted Patent B2
US 11,804,441 · App. 16/902,910 · Granted Oct 31, 2023

Microelectronic structures including bridges

Inventors: Omkar G. Karhade (Chandler, AZ); Nitin A. Deshpande (Chandler, AZ); Mohit Bhatia (Chandler, AZ); Debendra Mallik (Chandler, AZ)
Assignee: Intel Corporation
H01L23/5385H01L21/481H01L21/4853H01L21/4857H01L23/49833H01L24/16H01L24/17H01L24/73H01L25/0652H01L25/0655H01L25/18H01L2224/16145H01L2224/16227H01L2224/1703H01L2224/17181H01L2224/73253
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Quick Facts
Patent No.
US 11,804,441
App. No.
16/902,910
Granted
Oct 31, 2023
Kind
B2
Abstract

Disclosed herein are microelectronic structures including bridges, as well as related assemblies and methods. In some embodiments, a microelectronic structure may include a substrate including a first metal layer and a second metal layer; a cavity in the substrate, wherein a portion of the first metal layer in the substrate and a portion of the second metal layer in the substrate are exposed in the cavity; and a bridge component in the cavity, the bridge component includes a first conductive contact at a first face and a second conductive contacts at an opposing second face, wherein the second face of the bridge component is between the first face of the bridge component and a bottom surface of the cavity in the substrate, and wherein the second conductive contact is electrically coupled to the portion of the first metal layer in the cavity.

Claims (22)

1. A microelectronic structure, comprising:

a substrate including a first metal layer and a second metal layer;

a cavity in the substrate, wherein a portion of the first metal layer in the substrate, and a portion of the second metal layer in the substrate, are exposed in the cavity, and wherein the portion of the first metal layer at least partially overlaps the portion of the second metal layer; and

a bridge component in the cavity, wherein the bridge component includes a first face and an opposing second face, wherein the second face of the bridge component is between the first face of the bridge component and a bottom surface of the cavity in the substrate, wherein the bridge component includes a first conductive contact at the first face and a second conductive contact at the second face, wherein the second conductive contact is electrically coupled to the portion of the first metal layer in the cavity, and wherein the portion of the first metal layer is between the second face of the bridge component and the portion of the second metal layer.

2. The microelectronic structure of claim 1 , wherein the second conductive contact is electrically coupled to the portion of the first metal layer by solder.

3. The microelectronic structure of claim 1 , wherein the portion of the first metal layer and the portion of the second metal layer together provide the bottom surface of the cavity.

4. The microelectronic structure of claim 1 , further comprising:

a microelectronic component electrically coupled to the first conductive contact at the first face of the bridge component.

5. The microelectronic structure of claim 4 , wherein the substrate further includes a third conductive contact outside the cavity and the microelectronic component is electrically coupled to the third conductive contact of the substrate.

6. A microelectronic assembly, comprising:

a substrate including a first metal layer and a second metal layer, wherein a face of the substrate includes first conductive contacts;

a cavity in the substrate, wherein a portion of the first metal layer in the substrate, and a portion of the second metal layer in the substrate, are exposed in the cavity, and wherein the portion of the first metal layer at least partially overlaps the portion of the second metal layer;

a bridge component in the cavity, wherein the bridge component includes a first face and an opposing second face, wherein the second face of the bridge component is between the first face of the bridge component and a bottom surface of the cavity in the substrate, wherein the portion of the first metal layer is between the second face of the bridge component and the portion of the second metal layer, wherein the bridge component includes second conductive contacts at the first face and a third conductive contact at the second face, and wherein the third conductive contact is electrically coupled to the portion of the first metal layer; and

a microelectronic component having a face including fourth conductive contacts, wherein some of the fourth conductive contacts of the microelectronic component are conductively coupled to the first conductive contacts of the substrate, and wherein some of the fourth conductive contacts of the microelectronic component are conductively coupled to the second conductive contacts at the first face of the bridge component.

7. The microelectronic assembly of claim 6 , wherein a pitch of first conductive contacts of the substrate is greater than a pitch of second conductive contacts of the bridge component.

8. The microelectronic assembly of claim 6 , wherein the microelectronic component is a first microelectronic component, and the microelectronic assembly further includes:

a second microelectronic component having a face including fifth conductive contacts, wherein some of the fifth conductive contacts of the second microelectronic component are conductively coupled to first conductive contacts of the substrate, and wherein some of the fifth conductive contacts of the second microelectronic component are conductively coupled to second conductive contacts at the first face of the bridge component.

9. The microelectronic assembly of claim 6 , wherein the microelectronic component includes a die.

10. The microelectronic assembly of claim 6 , further comprising:

a fill compound between the microelectronic component and the substrate.

11. The microelectronic assembly of claim 6 , wherein the microelectronic component includes a transistor.

12. The microelectronic assembly of claim 6 , wherein the microelectronic assembly has a footprint that is less than 100 square millimeters.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 16, 2020
From: KARHADE, OMKAR G.; DESHPANDE, NITIN A.; BHATIA, MOHIT; MALLIK, DEBENDRA
To: INTEL CORPORATION
Reel/Frame 052953/0551 →
Continuity (1)
Related Publication 20210391268A1 · Dec 16, 2021