IP Library Granted Patent US 11,809,873
Granted Patent B2
US 11,809,873 · App. 17/033,749 · Granted Nov 7, 2023

Selective use of branch prediction hints

Inventors: Jared W. Stark (Portland, OR); Ahmad Yasin (Haifa, IL); Ajay Amarsingh Singh (Folsom, CA)
Assignee: Intel Corporation
G06F9/3842G06F9/30145G06F9/3867G06F12/0804
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Quick Facts
Patent No.
US 11,809,873
App. No.
17/033,749
Granted
Nov 7, 2023
Kind
B2
Abstract

Embodiments of apparatuses, methods, and systems for selective use of branch prediction hints are described. In an embodiment, an apparatus includes an instruction decoder and a branch predictor. The instruction decoder is to decode a branch instruction having a hint. The branch predictor is to provide a prediction and a hint-override indicator. The hint-override indicator is to indicate whether the prediction is based on stored information about the branch instruction. The prediction is to override the hint if the hint-override indicator indicates that the prediction is based on stored information about the branch instruction.

Claims (30)

1. An apparatus comprising:

an instruction decoder to decode a branch instruction having a hint; and

a branch predictor to provide a prediction and a hint-override indicator, wherein the hint-override indicator is to indicate whether the prediction is based on stored information about the branch instruction, and wherein the prediction is to override the hint if the hint-override indicator indicates that the prediction is based on stored information about the branch instruction.

2. The apparatus of claim 1 , further comprising a tagged structure to provide the stored information.

3. The apparatus of claim 1 , wherein the instruction decoder is to associate a branch hint override indicator to the decoded branch instruction.

4. The apparatus of claim 3 , wherein the branch hint override indicator is to be passed down an execution core pipeline from the instruction decoder.

5. The apparatus of claim 4 , wherein override the hint includes flushing of the execution pipeline of instructions following a hint path.

6. The apparatus of claim 1 , further comprising a counter to count conditional branch instructions for which the branch predictor has no stored information and for which the prediction is to not take a branch.

7. The apparatus of claim 1 , further comprising a counter to count correct predictions for conditional branch instructions for which the branch predictor has no stored information and for which the prediction is to not take a branch.

8. The apparatus of claim 1 , further comprising a counter to count mispredictions for conditional branch instructions for which the branch predictor has no stored information and for which the prediction is to not take a branch.

9. The apparatus of claim 1 , further comprising a counter to count conditional branch instructions for which the branch predictor has no stored information and for which the prediction is to take a branch.

10. The apparatus of claim 1 , further comprising a counter to count correct predictions for conditional branch instructions for which the branch predictor has no stored information and for which the prediction is to take a branch.

11. The apparatus of claim 1 , further comprising a counter to count mispredictions for conditional branch instructions for which the branch predictor has no stored information and for which the prediction is to take a branch.

12. A method comprising:

receiving, by a branch predictor, a branch instruction with a hint;

making a prediction;

determining whether the prediction was based on stored information about the branch instruction;

setting a hint-override indicator if the prediction was based on stored information; and

overriding the hint if the hint-override indicator indicates that the prediction was based on stored information.

13. The method of claim 12 , further comprising using the hint if the hint-override indicator indicates that the prediction was not based on stored information.

14. The method of claim 12 , wherein overriding the hint includes flushing an execution pipeline of instructions following a hint path.

15. The method of claim 14 , further comprising counting conditional branch instructions for which the branch predictor had no stored information and for which the prediction was to not take a branch.

16. The method of claim 14 , further comprising counting correct predictions for conditional branch instructions for which the branch predictor had no stored information and for which the prediction was to not take a branch.

17. The method of claim 14 , further comprising counting mispredictions for conditional branch instructions for which the branch predictor had no stored information and for which the prediction was to not take a branch.

18. A method comprising:

executing code including branch instructions having hints on a processor having a branch predictor to provide a prediction and a hint-override indicator, wherein the hint-override indicator is to indicate whether the prediction is based on stored information about the branch instruction;

overriding the hints if the hint-override indicator indicates that the prediction is based on stored information about the corresponding branch instruction; and

counting mispredictions for conditional branch instructions for which the branch predictor had no stored information and for which the prediction was to not take a branch.

19. The method of claim 18 , further comprising profiling the code based on the count of mispredictions.

20. The method of claim 19 , wherein profiling includes finding branch instructions to which to add hints.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2021
From: STARK, JARED W.; YASIN, AHMAD; SINGH, AJAY AMARSINGH
To: INTEL CORPORATION
Reel/Frame 056773/0594 →
Continuity (2)
Provisional Application 63017583 · Apr 29, 2020
Related Publication 20210342157A1 · Nov 4, 2021
Cited By (1)
US 12,282,778