Clock signal generation circuit and method, and electronic device

1. A clock signal generation circuit, comprising a control word generation circuit, an initial clock generation circuit and a spread spectrum clock generation circuit, wherein

the control word generation circuit is connected to the initial clock generation circuit and the spread spectrum clock generation circuit, and the control word generation circuit is configured to generate a first frequency control word, a second frequency control word and a third frequency control word based on a spread spectrum parameter, output the first frequency control word and the second frequency control word to the initial clock generation circuit, and output the third frequency control word to the spread spectrum clock generation circuit;

the initial clock generation circuit is further connected to the spread spectrum clock generation circuit, and the initial clock generation circuit is configured to generate an initial clock signal with a target duty ratio based on the first frequency control word and the second frequency control word and output the initial clock signal to the spread spectrum clock generation circuit; and

the spread spectrum clock generation circuit is configured to perform spread spectrum processing on the initial clock signal based on the target duty ratio of the initial clock signal and the third frequency control word to acquire a spread spectrum clock signal.

2. The clock signal generation circuit according to claim 1 , wherein the spread spectrum clock generation circuit comprises a voltage conversion sub-circuit, a first reference clock generation sub-circuit and a spread spectrum clock generation sub-circuit, wherein

the voltage conversion sub-circuit is connected to the initial clock generation circuit and the first reference clock generation sub-circuit, and the voltage conversion sub-circuit is configured to convert an initial voltage to a target voltage based on the target duty ratio of the initial clock signal and provide the target voltage to the first reference clock generation sub-circuit;

the first reference clock generation sub-circuit is further connected to the spread spectrum clock generation sub-circuit, and the first reference clock generation sub-circuit is configured to generate a plurality of first reference clock signals under drive of the target voltage and output the plurality of first reference clock signals to the spread spectrum clock generation sub-circuit, wherein a phase difference between every two adjacent first reference clock signals is the same; and

the spread spectrum clock generation sub-circuit is further connected to the control word generation circuit, and the spread spectrum clock generation sub-circuit is configured to perform the spread spectrum processing on the initial clock signal based on the third frequency control word and the plurality of first reference clock signals to acquire the spread spectrum clock signal.

3. The clock signal generation circuit according to claim 2 , wherein the first reference clock generation sub-circuit comprises a first ring oscillator (RO).

4. The clock signal generation circuit according to claim 2 , wherein the spread spectrum clock generation sub-circuit comprises a first input unit, a first selection unit and a first output unit, wherein

the first input unit is connected to the control word generation circuit and the first selection unit, and the first input unit is configured to output a first selection control signal to the first selection unit based on the third frequency control word;

the first selection unit is further connected to the first reference clock generation sub-circuit and the first output unit, and the first selection unit is configured to select a first candidate clock signal from the plurality of first reference clock signals in response to the first selection control signal and output the first candidate clock signal to the first output unit; and

the first output unit is configured to perform the spread spectrum processing on the initial clock signal based on the first candidate clock signal to acquire the spread spectrum clock signal.

5. The clock signal generation circuit according to claim 2 , further comprising: a power supply, wherein

the power supply is connected to the voltage conversion sub-circuit, and the power supply is configured to provide the initial voltage to the voltage conversion sub-circuit.

6. The clock signal generation circuit according to claim 1 , wherein the initial clock generation circuit comprises a second reference clock generation sub-circuit and an initial clock generation sub-circuit, wherein

the second reference clock generation sub-circuit is connected to the initial clock generation sub-circuit, and the second reference clock generation sub-circuit is configured to generate a plurality of second reference clock signals under drive of a reference voltage and output the plurality of second reference clock signals to the initial clock generation sub-circuit, wherein a phase difference between any two adjacent second reference clock signals is the same; and

the initial clock generation sub-circuit is further connected to the control word generation circuit and the spread spectrum clock generation circuit, and the initial clock generation sub-circuit is configured to generate the initial clock signal based on the first frequency control word, the second frequency control word and the plurality of second reference clock signals and output the initial clock signal to the spread spectrum clock generation circuit.

7. The clock signal generation circuit according to claim 6 , wherein the second reference clock generation sub-circuit comprises a second RO.

8. The clock signal generation circuit according to claim 6 , wherein the initial clock generation sub-circuit comprises a second input unit, a second selection unit and a second output unit, wherein

the second input unit is connected to the control word generation circuit and the second selection unit, and the second input unit is configured to output a second selection control signal to the second selection unit based on the first frequency control word and the second frequency control word;

the second selection unit is further connected to the second reference clock generation sub-circuit and the second output unit, and the second selection unit is configured to select a second candidate clock signal from the plurality of second reference clock signals in response to the second selection control signal and output the second candidate clock signal to the second output unit; and

the second output unit is further connected to the spread spectrum clock generation circuit, and the second output unit is configured to generate the initial clock signal based on the second candidate clock signal and output the initial clock signal to the spread spectrum clock generation circuit.

9. The clock signal generation circuit according to claim 1 , wherein the first frequency control word and the second frequency control word are both positive integers.

10. The clock signal generation circuit according to claim 1 , wherein the third frequency control word comprises an integer part and a fractional part.

11. The clock signal generation circuit according to claim 1 , wherein the spread spectrum parameter comprises at least one of a modulation type parameter, a modulation depth parameter and a center frequency parameter.

12. The clock signal generation circuit according to claim 8 , wherein

the spread spectrum clock generation sub-circuit comprises a first input unit, a first selection unit and a first output unit,

wherein the first input unit is connected to the control word generation circuit and the first selection unit, and the first input unit is configured to output a first selection control signal to the first selection unit based on the third frequency control word; the first selection unit is further connected to the first reference clock generation sub-circuit and the first output unit, and the first selection unit is configured to select a first candidate clock signal from the plurality of first reference clock signals in response to the first selection control signal and output the first candidate clock signal to the first output unit; and the first output unit is configured to perform the spread spectrum processing on the initial clock signal based on the first candidate clock signal to acquire the spread spectrum clock signal;

the clock signal generation circuit further comprises a power supply, wherein the power supply is connected to the voltage conversion sub-circuit, and the power supply is configured to provide the initial voltage to the voltage conversion sub-circuit;

the second reference clock generation sub-circuit comprises a second RO;

the first frequency control word and the second frequency control word are both positive integers, and the third frequency control word comprises an integer part and a fractional part; and

the spread spectrum parameter comprises at least one of a modulation type parameter, a modulation depth parameter and a center frequency parameter.

13. A clock signal generation method, comprising:

generating, by a control word generation circuit, a first frequency control word, a second frequency control word and a third frequency control word based on a spread spectrum parameter, and outputting, by the control word generation circuit, the first frequency control word and the second frequency control word to an initial clock generation circuit and the third frequency control word to a spread spectrum clock generation circuit;

generating, by the initial clock generation circuit, an initial clock signal with a target duty ratio based on the first frequency control word and the second frequency control word, and outputting, by the initial clock generation circuit, the initial clock signal to the spread spectrum clock generation circuit; and

performing, by the spread spectrum clock generation circuit, spread spectrum processing on the initial clock signal based on the target duty ratio of the initial clock signal and the third frequency control word to acquire a spread spectrum clock signal.

14. The method according to claim 13 , wherein the spread spectrum clock generation circuit comprises a voltage conversion sub-circuit, a first reference clock generation sub-circuit and a spread spectrum clock generation sub-circuit; and

performing by the spread spectrum clock generation circuit the spread spectrum processing on the initial clock signal based on the target duty ratio of the initial clock signal and the third frequency control word to acquire the spread spectrum clock signal comprises:

converting, by the voltage conversion sub-circuit, an initial voltage to a target voltage based on the target duty ratio of the initial clock signal, and providing, by the voltage conversion sub-circuit, the target voltage to the first reference clock generation sub-circuit;

generating, by the first reference clock generation sub-circuit, a plurality of first reference clock signals under drive of the target voltage, and outputting, by the first reference clock generation sub-circuit, the plurality of first reference clock signals to the spread spectrum clock generation sub-circuit, wherein a phase difference between any two adjacent first reference clock signals is the same; and

performing, by the spread spectrum clock generation sub-circuit, the spread spectrum processing on the initial clock signal based on the third frequency control word and the plurality of first reference clock signals to acquire the spread spectrum clock signal.

15. An electronic device, comprising: a controlled circuit and a clock signal generation circuit, wherein

the clock signal generation circuit is connected to the controlled circuit, and the controlled circuit is configured to operate in response to a spread spectrum clock signal output from the clock signal generation circuit; and

the clock signal generation circuit comprises a control word generation circuit, an initial clock generation circuit and a spread spectrum clock generation circuit, wherein

the control word generation circuit is connected to the initial clock generation circuit and the spread spectrum clock generation circuit, and the control word generation circuit is configured to generate a first frequency control word, a second frequency control word and a third frequency control word based on a spread spectrum parameter, output the first frequency control word and the second frequency control word to the initial clock generation circuit, and output the third frequency control word to the spread spectrum clock generation circuit;

the initial clock generation circuit is further connected to the spread spectrum clock generation circuit, and the initial clock generation circuit is configured to generate an initial clock signal with a target duty ratio based on the first frequency control word and the second frequency control word and output the initial clock signal to the spread spectrum clock generation circuit; and

the spread spectrum clock generation circuit is configured to perform spread spectrum processing on the initial clock signal based on the target duty ratio of the initial clock signal and the third frequency control word to acquire a spread spectrum clock signal.

16. The electronic device according to claim 15 , wherein the spread spectrum clock generation circuit comprises a voltage conversion sub-circuit, a first reference clock generation sub-circuit and a spread spectrum clock generation sub-circuit, wherein

the voltage conversion sub-circuit is connected to the initial clock generation circuit and the first reference clock generation sub-circuit, and the voltage conversion sub-circuit is configured to convert an initial voltage to a target voltage based on the target duty ratio of the initial clock signal and provide the target voltage to the first reference clock generation sub-circuit;

the first reference clock generation sub-circuit is further connected to the spread spectrum clock generation sub-circuit, and the first reference clock generation sub-circuit is configured to generate a plurality of first reference clock signals under drive of the target voltage and output the plurality of first reference clock signals to the spread spectrum clock generation sub-circuit, wherein a phase difference between every two adjacent first reference clock signals is the same; and

the spread spectrum clock generation sub-circuit is further connected to the control word generation circuit, and the spread spectrum clock generation sub-circuit is configured to perform the spread spectrum processing on the initial clock signal based on the third frequency control word and the plurality of first reference clock signals to acquire the spread spectrum clock signal.

17. The electronic device according to claim 16 , wherein the first reference clock generation sub-circuit comprises a first ring oscillator (RO).

18. The electronic device according to claim 16 , wherein the spread spectrum clock generation sub-circuit comprises a first input unit, a first selection unit and a first output unit, wherein

the first input unit is connected to the control word generation circuit and the first selection unit, and the first input unit is configured to output a first selection control signal to the first selection unit based on the third frequency control word;

the first selection unit is further connected to the first reference clock generation sub-circuit and the first output unit, and the first selection unit is configured to select a first candidate clock signal from the plurality of first reference clock signals in response to the first selection control signal and output the first candidate clock signal to the first output unit; and

the first output unit is configured to perform the spread spectrum processing on the initial clock signal based on the first candidate clock signal to acquire the spread spectrum clock signal.

19. The electronic device according to claim 16 , further comprising: a power supply, wherein

the power supply is connected to the voltage conversion sub-circuit, and the power supply is configured to provide the initial voltage to the voltage conversion sub-circuit.

20. The electronic device according to claim 15 , wherein the initial clock generation circuit comprises a second reference clock generation sub-circuit and an initial clock generation sub-circuit, wherein

the second reference clock generation sub-circuit is connected to the initial clock generation sub-circuit, and the second reference clock generation sub-circuit is configured to generate a plurality of second reference clock signals under drive of a reference voltage and output the plurality of second reference clock signals to the initial clock generation sub-circuit, wherein a phase difference between any two adjacent second reference clock signals is the same; and

the initial clock generation sub-circuit is further connected to the control word generation circuit and the spread spectrum clock generation circuit, and the initial clock generation sub-circuit is configured to generate the initial clock signal based on the first frequency control word, the second frequency control word and the plurality of second reference clock signals and output the initial clock signal to the spread spectrum clock generation circuit.