SiC jfet logic output level-shifting using integrated-series forward-biased jfet gate-to-channel diode junctions

1. A silicon carbide junction field effect transistor logic output level shifting circuit comprising:

an input stage including a resistor:

a first resistorless output path including a first junction field effect transistor with a first gate, first drain, and first source, the first gate connected to the resistor; and

a level shifting diode connected to the first source wherein the resistor and the level shifting diode provide compensating temperature sensitivities.

2. The circuit of claim 1 further comprising:

a second resistorless output path including a second junction field effect transistor with a second gate, second drain, and second source;

two series connected level shifting diodes connected the second source.

3. The circuit of claim 2 further comprising:

a third resistorless output path including a third junction field effect transistor with a third gate, third drain, and third source:

three series connected level shifting diodes connected the third source.

4. The circuit of claim 3 further comprising:

a fourth resistorless output path including a fourth junction field effect transistor with a fourth gate, fourth drain, and fourth source;

four series connected level shifting diodes connected the fourth source.

5. A silicon carbide junction field effect transistor logic output level shifting circuit with an output stage, the circuit comprising:

a resistive input stage:

a resistorless output path including a diode degenerated junction field effect transistor with a source connected to the output stage wherein the resistive input stage and the diode degenerated junction field effect transistor provide compensating temperature sensitivities.

6. The circuit of claim 5 , further comprising:

the input stage including a signal inverter.