System and method of power management for touch and display supplies in multiple power domains
A power management circuit can comprise a direct-current-to-direct-current (DC-DC) converter and a guard buffer. The guard buffer can be referenced to a system ground and configured to generate a guard ground. The power management circuit can comprise a supply capacitor coupled to the DC-DC converter that can be referenced to system ground in a first mode and referenced to the guard ground in a second mode. A regulator can be coupled to the DC-DC converter and referred to system ground in the first mode, and decoupled and referred to guard ground in the second mode. The DC-DC converter can generate a first voltage in the first mode and a second voltage in the second mode, the second voltage greater than the first.
1. A power management circuit comprising:
a direct-current-to-direct-current (DC-DC) converter referenced to a system ground;
a guard buffer referenced to the system ground and configured to generate a guard ground;
a supply capacitor coupled to an output of the DC-DC converter and referenced to the system ground in a first mode of operation and decoupled from the output of the DC-DC converters and referenced to the guard ground in a second mode of operation; and
a regulator coupled to the supply capacitor, wherein the regulator is coupled to the output of the DC-DC converter in the first mode of operation and decoupled from the output of the DC-DC converter during at least a portion of the second mode of operation;
wherein the DC-DC converter is configured to generate a first voltage in the first mode of operation and to generate a second voltage in the second mode of operation, wherein the second voltage is greater than the first voltage.
2. The power management circuit of claim 1 , wherein the DC-DC converter is configured to generate the first voltage during a first portion of the first mode of operation and configured to generate the second voltage during a second portion of the first mode of operation, wherein the second portion of the first mode of operation is within a threshold period of time before the second mode of operation.
3. The power management circuit of claim 1 , wherein a difference between the first voltage and the second voltage is greater than or equal to a voltage drop of the supply capacitor during the second mode and a voltage difference between the guard ground and system ground.
4. The power management circuit of claim 1 , wherein the second voltage is 200-400 mV greater than the first voltage.
5. The power management circuit of claim 1 , wherein the DC-DC converter is a buck converter.
6. The power management circuit of claim 1 , wherein the guard buffer is configurable to operate in an arbitrary waveform generation mode or in a push-pull mode to generate the guard ground.
7. The power management circuit of claim 6 , wherein the guard buffer comprises:
an amplifier;
a push-pull output stage coupled to an output of the amplifier;
a current digital-to-analog converter coupled to a non-inverting input of the amplifier and coupled to the output of the push-pull output stage; and
a voltage digital-to-analog converter coupled to an inverting input of the amplifier;
wherein the current digital-to-analog converter and the voltage digital-to-analog converter are configured to generate a guard ground waveform during the arbitrary waveform generation mode.
8. The power management circuit of claim 6 , wherein the guard buffer further comprises:
an amplifier;
a push-pull output stage coupled to an output of the amplifier;
a current source coupled to a non-inverting input of the amplifier and coupled to the output of the push-pull output stage;
a first slew rate control between a positive power rail and the output of the push-pull output stage; and
a first reference current digital-to-analog converter coupled to the first slew rate control and configured to control a slew rate of pulling the output of the push-pull output stage to the positive power rail during the push-pull mode.
9. The power management circuit of claim 8 , wherein the guard buffer further comprises:
a second slew rate control between a guard ground node and the system ground; and
a second reference current digital-to-analog converter coupled to the second slew rate control and configured to control a slew rate of pulling the output of the push-pull output stage to a system ground rail during the push-pull mode.
10. The power management circuit of claim 1 , wherein the DC-DC converter is configurable to operate in a pulse-width modulation mode using pulse-width modulation circuitry or in a pulse-frequency modulation mode using pulse-frequency modulation circuitry, wherein a first clock signal used by the pulse-width modulation circuitry is different that a second clock signal used by the pulse-frequency modulation circuitry.
11. The power management circuit of claim 10 , wherein the first clock signal is an integer multiple of a touch sensing stimulation frequency.
12. The power management circuit of claim 10 , where the first clock signal is generated using a first oscillator generating a frequency greater than 100 kHz and the second clock signal is generated by a second oscillator generating a frequency less 100 kHz.
13. The power management circuit of claim 12 , where the first oscillator is powered on a threshold period of time before a touch sensing operation and powered off after the touch sensing operation.
14. The power management circuit of claim 10 , wherein the DC-DC converter is configured to operate in the pulse-width modulation mode for a touch sensing operation and configured to operate in the pulse-frequency modulation mode outside of the touch sensing operation.
15. An electronic device comprising:
an energy storage device;
communication circuitry;
a touch screen; and
a power management circuit coupled to the energy storage device and coupled to the touch screen, wherein the power management circuit comprises:
a direct-current-to-direct-current (DC-DC) converter referenced to a system ground;
a guard buffer referenced to the system ground and configured to generate a guard ground;
a supply capacitor coupled to an output of the DC-DC converter and referenced to the system ground in a first mode of operation and decoupled from the output of the DC-DC converters and referenced to the guard ground in a second mode of operation; and
a regulator coupled to the supply capacitor, wherein the regulator is coupled to the output of the DC-DC converter in the first mode of operation and decoupled from the output of the DC-DC converter during at least a portion of the second mode of operation;
wherein the DC-DC converter is configured to generate a first voltage in the first mode of operation and to generate a second voltage in the second mode of operation, wherein the second voltage is greater than the first voltage.
16. The electronic device of claim 15 , wherein the DC-DC converter is configured to generate the first voltage during a first portion of the first mode of operation and configured to generate the second voltage during a second portion of the first mode of operation, wherein the second portion of the first mode of operation is within a threshold period of time before the second mode of operation.
17. The electronic device of claim 15 , wherein a difference between the first voltage and the second voltage is greater than or equal to a voltage drop of the supply capacitor during the second mode and a voltage difference between the guard ground and system ground.
18. The electronic device of claim 15 , wherein the guard buffer is configurable to operate in an arbitrary waveform generation mode or in a push-pull mode to generate the guard ground.
19. The electronic device of claim 15 , wherein the DC-DC converter is configurable to operate in a pulse-width modulation mode using pulse-width modulation circuitry or in a pulse-frequency modulation mode using pulse-frequency modulation circuitry, wherein a first clock signal used by the pulse-width modulation circuitry is different that a second clock signal used by the pulse-frequency modulation circuitry.
20. The electronic device of claim 19 , wherein the DC-DC converter is configured to operate in the pulse-width modulation mode for a touch sensing operation and configured to operate in the pulse-frequency modulation mode outside of the touch sensing operation.