IP Library Granted Patent US 11,894,775
Granted Patent B2
US 11,894,775 · App. 17/470,157 · Granted Feb 6, 2024

Power conversion method using a synergetic control of two power converters

Inventors: Johann Walter Kolar (Zurich, CH); Yunni Li (Zürich, CH); Jannik Robin Schaefer (Waedenswil, CH)
Assignee: Infineon Technologies Austria AG
H02M3/33573H02M1/4208H02M1/4216H02M3/01H02M3/33576H02M3/33592H02M1/007
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,894,775
App. No.
17/470,157
Granted
Feb 6, 2024
Kind
B2
Abstract

A power conversion method is disclosed. The method includes operating a PFC converter configured to receive three input voltages and provide a DC link voltage between DC link nodes in one of at least two different operating modes, and operating an SR converter coupled to the PFC converter via the DC link nodes in one of at least two different operating modes dependent on an output voltage of the SR converter. Operating the SR converter includes regulating a voltage level of the DC link voltage dependent on a DC link voltage reference, and the at least two different operating modes of the SR converter include a buck mode and a series resonant mode.

Claims (56)

1. A power conversion method, comprising:

operating a PFC converter configured to receive three input voltages and provide a DC link voltage between DC link nodes in one of at least two different operating modes; and

operating an SR converter coupled to the PFC converter via the DC link nodes in one of at least two different operating modes dependent on an output voltage of the SR converter,

wherein operating the SR converter comprises regulating a voltage level of the DC link voltage dependent on a DC link voltage reference, and

wherein the at least two different operating modes of the SR converter include a buck mode and a series resonant mode.

2. The method of claim 1 , wherein operating the SR converter in one of at least two different operating modes comprises:

operating the SR converter in the buck mode when the output voltage is lower than a first voltage threshold.

3. The method of claim 2 ,

wherein the SR converter comprises a transformer with a winding ratio wr between a number of windings np of a primary winding and a number of windings ns of a secondary winding, and

wherein the first voltage threshold (Uth 1 ) is given by

Uth

1

Ull_max

wr

,

where Ull_max is a maximum line-to-line voltage of the input voltage.

4. The method of claim 1 ,

wherein the SR converter comprises a resonant circuit, and

wherein operating the SR converter in each of the at least two different operating modes comprises generating an alternating primary voltage received by the resonant circuit based on a DC link voltage available between the DC link nodes.

5. The method of claim 4 ,

wherein the resonant circuit has a resonant frequency, and

wherein a frequency of the primary voltage is between 9% and 110% of the resonant frequency.

6. The method of claim 4 ,

wherein operating the SR converter in the buck mode comprises modulating an amplitude of the primary voltage relative to a voltage level of the DC link voltage.

7. The method of claim 6 , wherein modulating the amplitude of the primary voltage relative to the DC link voltage comprises generating buck half-periods in which the primary voltage has a reduced amplitude that is lower than the DC link voltage for a predefined time duration.

8. The method of claim 7 , wherein the predefined time duration is the duration of the respective half-period.

9. The method of claim 7 , wherein the predefined time duration is less than the duration of the respective half-period.

10. The method of claim 7 , further comprising:

generating a buck half-period dependent on a half-period signal,

wherein a signal level of the half-period signal is dependent on the DC link voltage reference and the DC link voltage, and

wherein a buck half-period is generated each time the half-period signal has a predefined first signal level.

11. The method of claim 10 , wherein the half-period signal is generated such that the half-period signal has the first signal level when the DC link voltage is below the DC link voltage reference.

12. The method of claim 1 ,

wherein the at least two different operating modes of the PFC converter comprise a 1/3 mode and a 2/3 mode, and

wherein operating the PFC converter in one of the at least two different operating modes comprises operating the PFC converter in one of the at least two different operating modes dependent on the DC link voltage reference.

13. The method of claim 12 ,

wherein operating the PFC converter comprises regulating current waveforms of three input currents received by the PFC converter,

wherein regulating the current waveforms of the three input currents comprise regulating switch node voltages of the PFC converter dependent on switch node voltage references, and

wherein operating the PFC converter in one of the at least two different operating modes comprises operating the PFC converter in one of the at least two different operating modes dependent on a relationship between the DC link voltage reference and a maximum switch node voltage reference.

14. The method of claim 13 , wherein the PFC converter is operated in the 2/3 mode when the DC link voltage reference is higher than the maximum switch node voltage reference.

15. The method of claim 14 , wherein the DC link voltage reference is selected to be the larger of the maximum switch node voltage reference and an output voltage value that is dependent on the output voltage.

16. The method of claim 1 ,

wherein the at least two different operating modes of the SR converter further comprise a boost mode, and

wherein the method further comprises operating the SR converter in the boost mode when the output voltage is higher than a second threshold.

17. The method of claim 16 , wherein operating the SR converter in the boost mode comprises regulating the DC link voltage such that the DC link voltage has a fixed voltage level.

18. A power converter arrangement, comprising:

a PFC converter configured to receive three input voltages and provide a DC link voltage between DC link nodes;

an SR converter coupled to the PFC converter via the DC link nodes; and

a control circuit configured to:

operate the PFC converter in one of at least two operating modes,

operate the SR converter in one of at least two different operating modes dependent on an output voltage of the SR converter, and

regulate, by operating the SR converter, a voltage level of the DC link voltage dependent on a DC link voltage reference,

wherein the at least two different operating modes of the SR converter include a buck mode and a series resonant mode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 18, 2023
From: SCHAEFER, JANNIK ROBIN; KOLAR, JOHANN; LI, YUNNI
To: INFINEON TECHNOLOGIES AUSTRIA AG
Reel/Frame 062409/0460 →
Priority Claims (1)
EP 20196408 · Sep 16, 2020 · regional
Continuity (1)
Related Publication 20220085725A1 · Mar 17, 2022