IP Library Granted Patent US 11,928,028
Granted Patent B2
US 11,928,028 · App. 17/812,491 · Granted Mar 12, 2024

Exception handler for dynamic remediation of fatal errors

Inventors: Shekar Babu Suryanarayana (Bangalore, IN); Vivek Viswanathan Iyer (Saint Johns, FL)
Assignee: Dell Products, L.P.
G06F11/1417G06F11/0778
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Quick Facts
Patent No.
US 11,928,028
App. No.
17/812,491
Granted
Mar 12, 2024
Kind
B2
Abstract

An exception handler for dynamic remediation of fatal errors is described. In an illustrative, non-limiting embodiment, an Information Handling System (IHS) may include a Central Processing Unit (CPU) and a memory coupled to the CPU, the memory having program instructions stored thereon that, upon execution, cause the IHS to: in response to an error, call a CPU Exception Service Routine (ESR); and at least one of: re-initialize a pre-boot network stack and transmit error data to a remote service using the pre-boot network stack; or re-initialize a pre-boot storage stack and store the error data using the pre-boot storage stack.

Claims (33)

1. An Information Handling System (IHS), comprising:

a Central Processing Unit (CPU); and

a memory coupled to the CPU, the memory having program instructions stored thereon that, upon execution, cause the IHS to:

allocate memory space for a CPU Exception Service Routine (ESR) in a pre-Extensible Firmware Interface (EFI) initialization (PEI) phase;

in response to an error, call the CPU ESR; and

at least one of:

re-initialize a pre-boot network stack and transmit error data to a remote service using the pre-boot network stack; or

re-initialize a pre-boot storage stack and store the error data using the pre-boot storage stack.

2. The IHS of claim 1 , wherein the error comprises a Blue Screen of Death (BSoD) or stop error.

3. The IHS of claim 1 , wherein the error comprises a Power-On Self-Test (POST) error.

4. The IHS of claim 1 , wherein the error comprises at least one of: page fault, double fault, triple fault, abort, overflow, invalid opcode, general protection fault, or machine check.

5. The IHS of claim 1 , wherein the program instructions, upon execution, further cause the IHS to use the ESR to load an error remediation module.

6. The IHS of claim 1 , wherein the program instructions, upon execution, further cause the IHS to implement a runtime memory map of pre-boot drivers.

7. The IHS of claim 1 , wherein the program instructions, upon execution, further cause the IHS to continue an IHS boot from a point of failure corresponding to the error.

8. The IHS of claim 1 , wherein the program instructions, upon execution, further cause the IHS to remap an ESR table (ESRT) into a runtime memory space as an Interrupt Service Routine Table (ISRT).

9. The IHS of claim 8 , wherein the remapped ESRT is configured to handle an Operating System (OS) runtime failover exception.

10. The IHS of claim 1 , wherein the program instructions, upon execution, further cause the IHS to receive an auto-healing module from the remote service based, at least in part, upon the error data.

11. The IHS of claim 10 , wherein the auto-healing module is configured to allow the IHS to continue a current boot without any reboot or shutdown.

12. The IHS of claim 11 , wherein the auto-healing module is selected among other auto-healing modules classified as belonging to at least one of: a compute or memory domain, a power or thermal domain, or a peripheral or firmware domain.

13. The IHS of claim 12 , wherein the auto-healing module is selected based upon another error in another IHS.

14. In an Information Handling System (IHS), a method comprising:

in response to a fatal error, calling a Central Processing Unit (CPU) Exception Service Routine (ESR);

remapping an ESR table (ESRT) into a runtime memory space as an Interrupt Service Routine Table (ISRT); and

re-initializing a pre-boot network stack and transmitting error data to a remote service using the pre-boot network stack.

15. The method of claim 14 , further comprising using the ESR to load an error remediation module.

16. The method of claim 15 , further comprising booting the IHS from a point of failure corresponding to the error.

17. The method of claim 14 , wherein the remapped ESRT is configured to handle an Operating System (OS) runtime failover exception.

18. A non-transitory memory storage device having program instructions stored thereon that, upon execution by an Information Handling System (IHS), cause the IHS to:

in response to a fatal error, call a Central Processing Unit (CPU) Exception Service Routine (ESR);

remap an ESR table (ESRT) into a runtime memory space as an Interrupt Service Routine Table (ISRT), wherein the ISRT is configured to handle an Operating System (OS) runtime failover exception; and

re-initialize a pre-boot storage stack and store error data in the IHS using the pre-boot storage stack.

19. The non-transitory memory storage device of claim 18 , wherein the program instructions, upon execution, further cause the IHS to use the ESR to load an error remediation module.

20. The non-transitory memory storage device of claim 19 , wherein the error remediation module is configured to allow the IHS to continue a current boot without any reboot or shutdown.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2022
From: SURYANARAYANA, SHEKAR BABU; IYER, VIVEK VISWANATHAN
To: DELL PRODUCTS, L.P.
Reel/Frame 060503/0755 →
Continuity (1)
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