IP Library Granted Patent US 11,928,403
Granted Patent B2
US 11,928,403 · App. 17/192,929 · Granted Mar 12, 2024

Optimization apparatus and optimization method for annealing circuits

Inventors: Masato Sasaki (Kawasaki, JP); Satoshi Matsuura (Kawasaki, JP)
Assignee: FUJITSU LIMITED
G06F30/20G06F5/01G06F7/485G06F2119/08
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Quick Facts
Patent No.
US 11,928,403
App. No.
17/192,929
Granted
Mar 12, 2024
Kind
B2
Abstract

An optimization apparatus includes electronic circuits configured to perform calculating, for a plurality of annealing units to which respective states and respective, different temperatures are assigned, respective evaluation function values responsive to the respective states, and causing a transition in the states with probabilities responsive to the temperatures and the evaluation function values, exchanging the temperatures or the states between the plurality of annealing units with predetermined probabilities based on the temperatures and the evaluation function values, and changing a temperature of an annealing unit of interest, such that a probability of exchange between the annealing unit of interest and a first annealing unit situated next thereto on a lower temperature side in a sequence arranged in order of temperature approaches a probability of exchange between the annealing unit of interest and a second annealing unit situated next thereto on a higher temperature side in the sequence.

Claims (17)

1. An optimization apparatus comprising:

a plurality of annealing circuits configured to have respective states and respective temperatures differing from each other, to calculate respective evaluation function values responsive to the respective states, and to perform a state transition with probabilities responsive to the respective temperatures and the respective evaluation function values;

an exchange circuit configured to exchange the temperatures or the states between the plurality of annealing circuits with probabilities of exchange, a probability of exchange between two annealing circuits being calculated based on temperatures and evaluation function values of the two annealing circuits; and

a temperature adjustment circuit configured to change a post-exchange temperature of an annealing circuit of interest among the plurality of annealing circuits, the post-exchange temperature being a temperature immediately after exchange by the exchange circuit, such that a difference between the probability of exchange between the annealing circuit of interest and a first annealing circuit situated next thereto on a lower temperature side in a sequence arranged in order of temperature and the probability of exchange between the annealing circuit of interest and a second annealing circuit situated next thereto on a higher temperature side in the sequence arranged in order of temperature decreases,

each of the annealing circuits, the exchange circuit, and the temperature adjustment circuit are electronic circuits distinct from each other, and the annealing circuits are configured to operate in parallel to each other.

2. The optimization apparatus as claimed in claim 1 , wherein the post-exchange temperature of the annealing circuit of interest is changed such that, based on average values of evaluation function values over a plurality of state transitions, the difference between the probability of exchange between the first annealing circuit and the annealing circuit of interest and the probability of exchange between the second annealing circuit and the annealing circuit of interest decreases.

3. The optimization apparatus as claimed in claim 1 , wherein no change is caused to the post-exchange temperature of the annealing circuit of interest when either the probability of exchange between the first annealing circuit and the annealing circuit of interest or the probability of exchange between the second annealing circuit and the annealing circuit of interest is 1.

4. The optimization apparatus as claimed in claim 1 , wherein with respect to the plurality of annealing circuits arranged in order of temperature, post-exchange temperature adjustment for even-numbered annealing circuits and post-exchange temperature adjustment for odd-numbered annealing circuits are alternately performed.

5. The optimization apparatus as claimed in claim 2 , the evaluation function values and the average values are represented as fixed-point numbers, and a divisor for obtaining the average values is an exponentiation of 2, and

wherein the average values of evaluation function values are calculated by addition, subtraction, and bit shifts of values represented as fixed-point numbers.

6. The optimization apparatus as claimed in claim 1 , wherein a size of a change in thermodynamic beta for changing the post-exchange temperature of the annealing circuit of interest is proportional to a difference between a thermodynamic beta of the annealing circuit of interest and a thermodynamic beta of the first annealing circuit or the second annealing circuit.

7. The optimization apparatus as claimed in claim 1 , wherein a size of a change in thermodynamic beta for changing the post-exchange temperature of the annealing circuit of interest is a value obtained by dividing, by an exponentiation of 2, a difference between a thermodynamic beta of the annealing circuit of interest and a thermodynamic beta of the first annealing circuit or the second annealing circuit, and

wherein the thermodynamic beta is represented as a floating-point number, and a change in the post-exchange temperature of the annealing circuit of interest is calculated by addition and subtraction of values represented as floating-point numbers and subtraction of exponents thereof.

8. A method of performing simulated annealing in an optimization apparatus which includes a plurality of annealing circuits, an exchange circuit, and a temperature adjustment circuit, each of the annealing circuits, the exchange circuit, and the temperature adjustment circuit being electronic circuits distinct from each other, and the annealing circuits being configured to operate in parallel to each other, the method comprising:

causing the plurality of annealing circuits having respective states and respective temperatures differing from each other to calculate respective evaluation function values responsive to the respective states, and to perform a state transition with probabilities responsive to the respective temperatures and the respective evaluation function values;

exchanging, by the exchange circuit, the temperatures or the states between the plurality of annealing circuits with probabilities of exchange, a probability of exchange between two annealing circuits being calculated based on temperatures and evaluation function values of the two annealing circuits; and

changing, by the temperature adjustment circuit, a post-exchange temperature of an annealing circuit of interest among the plurality of annealing circuits, the post-exchange temperature being a temperature immediately after exchange by the exchange circuit, such that a difference between the probability of exchange between the annealing circuit of interest and a first annealing circuit situated next thereto on a lower temperature side in a sequence arranged in order of temperature and the probability of exchange between the annealing circuit of interest and a second annealing circuit situated next thereto on a higher temperature side in the sequence arranged in order of temperature decreases.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 5, 2021
From: SASAKI, MASATO; MATSUURA, SATOSHI
To: FUJITSU LIMITED
Reel/Frame 055503/0541 →
Continuity (2)
Continuation PCTJP2018034000 · Sep 13, 2018
Related Publication 20210192109A1 · Jun 24, 2021