Multi-stage automatic compilation for vector computations in applications

Inventors: Junyong Ding (Shanghai, CN); Mohammad Haghighat (San Jose, CA); Qi Zhang (Shanghai, CN); Sebastian Winkel (Los Altos, CA); Tianyou Li (Shanghai, CN)

Assignee: Intel Corporation

G06F8/41

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Quick Facts

Patent No.: US 11,934,809
App. No.: 17/053,531
Granted: Mar 19, 2024
Kind: B2

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Abstract

Systems, apparatuses and methods may provide for developer stage technology that embeds binary code into an application binary file, wherein the binary code corresponds to vector functions and non-vector functions in statically typed source code, and generates intermediate representation (IR) data, wherein the intermediate representation data corresponds to the vector functions in the statically typed source code. Additionally, the developer stage technology embeds the IR data in the application binary file. Moreover, deployment stage technology may generate a first compilation output based on the application binary file and detect a capability change in an execution environment associated with the first compilation output. The deployment stage technology may also generate, in response to the detected capability change, a second compilation output based on the first compilation output.

Claims (63)

1. A performance-enhanced computing system comprising:

a network controller to obtain an application binary file, wherein the application binary file includes first binary code corresponding to vector functions and non-vector functions and intermediate representation data corresponding to the vector functions, and wherein the application binary file further includes a vector function information table;

a processor coupled to the network controller; and

a memory including a set of executable program instructions, which when executed by the processor, cause the computing system to:

generate a first compilation output based on the application binary file;

detect a capability change in an execution environment associated with the first compilation output; and

generate, in response to the detected capability change, a second compilation output based on the first compilation output;

wherein to generate the second compilation output, the instructions, when executed, further cause the computing system to:

map the intermediate representation data to a unified interface invocation;

generate, via the unified interface invocation, second binary code based on the intermediate representation data and the detected capability change;

embed the second binary code into the second compilation output;

update the vector capability list based on the execution environment;

embed the updated vector capability list into the second compilation output; and

update one or more binary location field entries in the vector function information table.

2. The computing system of claim 1 , wherein to generate the first compilation output, the instructions, when executed, further cause the computing system to:

map the intermediate representation data to the unified interface invocation;

generate, via the unified interface invocation, third binary code based on the intermediate representation data and the execution environment; and

embed the third binary code into the first compilation output.

3. The computing system of claim 1 , wherein the instructions, when executed, further cause the computing system to:

generate a vector capability list based on the execution environment; and

embed the vector capability list into the first compilation output, wherein the capability change is detected based on the vector capability list.

4. The computing system of claim 1 , wherein to generate the first compilation output, the instructions, when executed, further cause the computing system to update one or more binary location field entries in the vector function information table.

5. The computing system of claim 1 , wherein the capability change is one or more of a hardware change or a software change.

6. At least one non-transitory computer readable storage medium comprising a set of executable program instructions, which when executed by a computing system, cause the computing system to:

generate a first compilation output based on an application binary file, wherein the application binary file includes first binary code corresponding to vector functions and non-vector functions and intermediate representation data corresponding to the vector functions, and wherein the application binary file further includes a vector function information table;