Wearable cardioverter defibrillator (WCD) with power-saving function
A Wearable Cardioverter Defibrillator (WCD) system has a processor that performs two different analyses to an ECG of the patient. A first-level analysis can be computationally economical, while a fuller second-level analysis can give shock/no-shock advice with more certainty. In some of these embodiments the second-level analysis of the ECG is performed only if the first-level analysis of the ECG detects a possible shockable condition. As such, the first-level analysis may operate as a gatekeeping function, often preventing the more computationally intensive second-level analysis from being performed. An advantage can be that the WCD system needs to store less charge, for powering the processor. In turn, this permits portions of the WCD system to be less bulky and weigh less.
1. A wearable cardioverter defibrillator (WCD) system, comprising:
a support structure configured to be worn by a patient;
an energy storage module configured to store an electrical charge;
a discharge circuit coupled to the energy storage module;
a transducer configured to render, from a sensed Electrocardiogram (ECG) of the patient, a physiological input that includes ECG data of the patient; and
a processor configured to:
perform a first-level analysis on a first portion of the physiological input to detect whether or not a possible shockable condition exists, the first portion including first ECG data from a first time segment,
perform, responsive to detecting by the first-level analysis that the possible shockable condition exists, a second-level analysis on a second portion of the physiological input to detect whether or not a shockable condition exists, the second portion including second ECG data from a second time segment, in which the second-level analysis is different from the first-level analysis, and performing the second-level analysis requires the processor to consume more energy than performing the first-level analysis if the first time segment had an equal duration with the second time segment, and
control, responsive to detecting that the shockable condition exists, the discharge circuit to discharge the stored electrical charge through the patient so as to deliver a shock to the patient while the support structure is worn by the patient.
2. The WCD system of claim 1 , in which
the first-level analysis has a higher sensitivity than the second-level analysis.
3. The WCD system of claim 1 , in which
the second time segment has a different time duration than the first time segment.
4. The WCD system of claim 1 , in which
the second time segment overlaps with the first time segment at least in part.
5. The WCD system of claim 1 , in which
the second-level analysis is performed responsive to a checking input being received.
6. The WCD system of claim 5 , further comprising:
a motion detector configured to generate the checking input responsive to a motion of the patient that is detected by the motion detector.
7. The WCD system of claim 5 , further comprising:
a timer configured to generate the checking input at a preset time.
8. The WCD system of claim 5 , further comprising:
an electrode; and
a leads-off module configured to detect when the electrode has lost contact with the patient, and to generate the checking input responsive to so detecting.
9. The WCD system of claim 5 , further comprising:
a noise detector configured to generate the checking input in response to detecting a noise reaching a threshold.
10. The WCD system of claim 1 , in which if the shocking condition is not detected to exist, the first-level analysis is then repeated.
11. The WCD system of claim 1 , in which
if the shocking condition is not detected to exist, neither the first level analysis nor the second-level analysis is then performed for a preset pause time.
12. The WCD system of claim 1 , in which
the ECG data is acquired from a plurality of ECG channels,
the first-level analysis includes analyzing the ECG data of a first number of the ECG channels, and
the second-level analysis includes analyzing the ECG data of a second number of the ECG channels that is larger than the first number.
13. The WCD system of claim 1 , in which
the ECG data is acquired from at least a first and a second ECG channels, the first ECG channel is designated as a selected ECG channel,
the first-level analysis includes analyzing the ECG data of only the selected ECG channel,
the second ECG channel becomes designated as a selected ECG channel responsive to the second-level analysis, and
after the second-level analysis is performed, the first-level analysis is performed again and includes analyzing the ECG data of only the second ECG channel that has been designated as the selected ECG channel.
14. The WCD system of claim 1 , in which
the first-level analysis includes extracting a numerical statistic from the first ECG data, and
the possible shockable condition is detected if a value of the statistic is beyond a threshold value.
15. The WCD system of claim 14 , in which
the statistic includes a heart rate.
16. The WCD system of claim 14 , in which
the statistic includes a heart rate, and
the possible shockable condition is detected if a value of the heart rate exceeds a threshold value of 135 BPM+/−10%.
17. The WCD system of claim 14 , in which
the statistic includes a heart rate, and
the possible shockable condition is detected if a value of the heart rate is less than a threshold value of 40 BPM+/−10%.
18. The WCD system of claim 14 , in which
the processor is configured to set or adjust the threshold value adaptively.
19. The WCD system of claim 1 , in which
the first-level analysis is performed on the first ECG data as the first ECG data is streaming only in a single direction.
20. The WCD system of claim 1 , further comprising:
one or more memories, and
in which the first-level analysis is performed on the first ECG data as the first ECG data is streaming from the transducer, and without the streaming first ECG data having been stored in any of the one or more memories.
21. The WCD system of claim 1 , further comprising:
a detector configured to generate a detector signal, and
in which the first-level analysis includes analyzing ECG data, while
the second-level analysis includes analyzing ECG data and the detector signal.
22. The WCD system of claim 1 , in which
the processor includes
a first computational module configured to perform the first-level analysis, and a second computational module distinct from the first computational module,
the second computational module configured to perform the second-level analysis.
23. The WCD system of claim 22 , in which
the first computational module and the second computational module are implemented in distinct cores of a multi-core processor, in which the multi-core processor is implemented by a single chip.
24. The WCD system of claim 22 , in which
the first computational module is implemented by a first chip, and
the second computational module is implemented by a second chip that is distinct from the first chip.
25. The WCD system of claim 22 , in which
the second computational module is not performing the second-level analysis at a time when the first computational module is performing the first-level analysis.
26. The WCD system of claim 22 , in which
the second computational module is
in a dormant state when the first computational module is performing the firstlevel analysis, but
in an awake state distinct than the dormant state when the second computational module is performing the second-level analysis.
27. The WCD system of claim 1 , in which
the processor has a chip that includes a computational module, and
the computational module is configured to operate in one of:
an awake state when the computational module performs either the first-level analysis or the second-level analysis, the chip consuming a high amount of power when the computational module operates in the awake state, and
a dormant state different from the awake state when the computational module performs neither the first-level analysis nor the second-level analysis, the chip consuming a low amount of power when in the dormant state, the low amount of power lesser than the high amount of power.
28. The WCD system of claim 27 , in which
the computational module is further configured to transition from the awake state to the dormant state responsive to the possible shockable condition or the shockable condition not being detected.
29. The WCD system of claim 27 , in which
the computational module is further configured to transition from the dormant state to the awake state responsive to a received wake-up input.
30. The WCD system of claim 1 , in which
the processor has a clock speed, and
the clock speed is faster when the second-level analysis is being performed than when the first-level analysis is being performed.