IP Library › Granted Patent US 11,971,298
Granted Patent B1
US 11,971,298 · App. 18/065,648 · Granted Apr 30, 2024

Pixel circuit and temperature sensing circuit adjusting signals in the same

Inventors: Ming-Yao Chen (Hsin-Chu, TW); Chang-Hung Li (Hsin-Chu, TW); Shin-Shueh Chen (Hsin-Chu, TW); Jui-Chi Lo (Hsin-Chu, TW)
Assignee: AUO CORPORATION
G01J1/44G01K7/01H01L27/14612G01J2001/444G01J2001/446G06V10/14G06V40/1318H04N25/63
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Quick Facts
Patent No.
US 11,971,298
App. No.
18/065,648
Granted
Apr 30, 2024
Kind
B1
Abstract

The present disclosure provides a sensing circuit, including a photo-sensing component, a first transistor, and a temperature-sensing component. The photo-sensing component is configured to receive a light and transmit a first current according to an intensity of the light. A gate terminal of the first transistor is configured to receive a first control circuit. The photo-sensing component and the first transistor are coupled in series between first and second nodes. The temperature-sensing component is coupled between the first and second nodes and is configured to generate a second current according to a temperature. The temperature-sensing component includes a channel structure, a first gate, a second gate, and a light-shielding structure. The channel structure is configured to transmit the second current.

Claims (63)

1. A sensing circuit, comprising:

a photo-sensing component, configured to receive a light and transmit a first current according to an intensity of the light;

a first transistor, a gate terminal of the first transistor being configured to receive a first control signal, wherein the photo-sensing component and the first transistor are coupled in series between a first node and a second node; and

a temperature-sensing component, coupled between the first node and the second node and configured to generate a second current according to a temperature, the temperature-sensing component comprising:

a channel structure, configured to transmit the second current;

a first gate, arranged above the channel structure and configured to control the channel structure to operate in an off state according to a second control signal;

a second gate, arranged below the channel structure and configured to control an intensity of the second current in the channel structure according to a third control signal; and

a light-shielding structure, arranged above the first gate and configured to shield the light coming from above the temperature-sensing component.

2. The sensing circuit of claim 1 , further comprising:

a capacitor, coupled between the first node and the second node;

wherein, during a photo-sensing period, the first transistor is turned on, and the second gate of the temperature-sensing component is configured to control the second current in the channel structure according to the third control signal; and

during a temperature-sensing period, the first transistor is turned off, and the second gate of the temperature-sensing component is configured to control the second current in the channel structure according to the third control signal;

wherein the second current during the photo-sensing period is smaller than the second current during temperature-sensing period.

3. The sensing circuit of claim 1 , further comprising:

a second transistor, a first terminal of the second transistor being configured to receive a first reference voltage, a second terminal of the second transistor being coupled to the first node, a gate terminal of the second transistor being configured to receive a fourth control signal.

4. The sensing circuit of claim 3 , further comprising:

a third transistor, a first terminal of the third transistor being configured to receive a second reference voltage, a gate terminal of the third transistor being configured to receive a voltage level of the first node.

5. The sensing circuit of claim 4 , further comprising:

a fourth transistor, a first terminal of the fourth transistor being coupled to a second terminal of the third transistor, a gate terminal of the fourth transistor being configured to receive a fifth control signal.

6. The sensing circuit of claim 1 , further comprising:

a second transistor, a first terminal of the second transistor being coupled to the first node, a gate terminal of the second transistor being coupled to a control line, a second terminal of the second transistor being coupled to a data line.

7. The sensing circuit of claim 1 , wherein

in response to the temperature, the temperature-sensing component is further configured to generate the second current;

wherein when the temperature is increased, the second current is increased.

8. The sensing circuit of claim 1 , wherein

the channel structure is an N-type channel;

in response to a voltage level of the third control signal being negative, the second gate is further configured to control the second current in the channel structure;

wherein the second current at a negative voltage level is larger than the second current at a positive voltage level.

9. The sensing circuit of claim 8 , wherein

in response to the second current al the negative voltage level, the temperature-sensing component is configured as a switch component.

10. The sensing circuit of claim 1 , further comprising:

a second transistor, a first terminal of the second transistor being coupled to a first reference voltage terminal, a second terminal of the second transistor being coupled to the first node, a gate terminal of the second transistor being configured to receive a fourth control signal.

11. The sensing circuit of claim 1 , further comprising:

a second transistor, a first terminal of the second transistor being coupled to a first reference voltage terminal, a gate terminal of the second transistor being configured to receive a voltage level of the first node.

12. The sensing circuit of claim 11 , further comprising:

a third transistor, a first terminal of the third transistor being coupled to a second terminal of the second transistor, a gate terminal of the third transistor being configured to receive a fourth control signal.

13. A pixel circuit, comprising:

a sensing circuit, comprising:

a semiconductor device, coupled between a first node and a second node, the semiconductor device comprising:

a channel structure, configured to transmit a first current;

a first gate, arranged above the channel structure and configured to control the channel structure to operate in an off state according to a first control signal;

a second gate, arranged below the channel structure and configured to control an intensity of the first current in the channel structure according to a second control signal; and

a light-shielding structure, arranged above the first gate and configured to shield a light coming from above the semiconductor device;

wherein, in response to the second gate controlling the first current in the channel structure, the semiconductor device is configured as a temperature-sensing component; and

in response to the second gate controlling the first current in the channel structure, the semiconductor device is configured as a switch component,

wherein the first current in a first period that the semiconductor device is configured as the temperature-sensing component is larger than the first current in a second period that the semiconductor device is configured as the switch component.

14. The pixel circuit of claim 13 , wherein the sensing circuit further comprises:

a photo-sensing component, configured to receive the light and transmit a second current according to an intensity of the light.

15. The pixel circuit of claim 14 , wherein the sensing circuit further comprises:

a first transistor, a gate terminal of the first transistor being configured to receive a third control signal, wherein the photo-sensing component and the first transistor are coupled in series between the first node and the second node; and

a capacitor, coupled between the first node and the second node.

16. The pixel circuit of claim 15 , wherein the sensing circuit further comprises:

a second transistor, a first terminal of the second transistor being coupled to the first node, a gate terminal of the second transistor being configured to receive a fourth control signal, a second terminal of the second transistor being configured to receive a fifth control signal;

wherein, in response to the fourth and fifth control signals having high logic levels, the second transistor is configured to reset a voltage level of the first node according to the fifth control signal.

17. The pixel circuit of claim 13 , further comprising:

a reset circuit, coupled between a first reference voltage terminal and the first node and configured to reset a voltage level of the first node according to a first reference voltage of the first reference voltage terminal; and

a signal amplifying circuit, coupled between a second reference voltage terminal and the first node and configured to generate an output signal according to a second reference voltage of the second reference voltage terminal and the voltage level of the first node.

18. The pixel circuit of claim 17 , wherein the reset circuit further comprises:

a first transistor, a first terminal of the first transistor being coupled to the first reference voltage terminal, a second terminal of the first transistor being coupled to the first node, a gate terminal of the first transistor being configured to receive a third control signal.

19. The pixel circuit of claim 17 , wherein the signal amplifying circuit further comprises:

a first transistor, a first terminal of the first transistor being coupled to the first reference voltage terminal, a gate terminal of the first transistor being configured to receive the voltage level of the first node.

20. The pixel circuit of claim 19 , wherein the signal amplifying circuit further comprises:

a second transistor, a first terminal of the second transistor being coupled to a second terminal of the first transistor, a gate terminal of the second transistor being configured to receive a third control signal.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2022
From: CHEN, MING-YAO; LI, CHANG-HUNG; CHEN, SHIN-SHUEH; LO, JUI-CHI
To: AUO CORPORATION
Reel/Frame 062078/0538 →
Priority Claims (1)
TW 111140699 · Oct 26, 2022 · national
Cited By (1)
US 12,705,918