Circuit device and oscillator

1. A circuit device comprising:

an oscillation circuit which is electrically coupled to a first node to electrically be coupled to one end of a resonator and a second node to electrically be coupled to another end of the resonator, the oscillation circuit being configured to oscillate the resonator to generate an oscillation signal, the oscillation circuit including:

an oscillation capacitor having one end coupled to the first node;

an oscillation resistor having:

one end coupled to another end of the oscillation capacitor; and

another end coupled to the second node;

a stationary capacitance capacitor having one end coupled to the first node, a capacitance value of the stationary capacitance capacitor being fixed; and

a variable capacitance element having one end coupled to another end of the stationary capacitance capacitor, a capacitance value of the variable capacitance element being variable;

a waveform shaping circuit which is coupled to the first node, to which the oscillation signal is input from the first node, and which is configured to output a clock signal obtained by performing waveform shaping on the oscillation signal; and

a duty adjustment circuit configured to:

supply the first node with a bias voltage which is variably adjusted based on adjustment data to thereby adjust a duty ratio of the clock signal; and

supply a reference voltage to the other end of the variable capacitance element.

2. The circuit device according to claim 1 further comprising:

a nonvolatile memory configured to store the adjustment data, wherein

the duty adjustment circuit generates the bias voltage of a voltage set in accordance with the adjustment data stored in the nonvolatile memory.

3. The circuit device according to claim 1 , wherein

a power supply voltage of the oscillation circuit is a voltage no lower than a power supply voltage of the waveform shaping circuit.

4. The circuit device according to claim 1 , wherein

the duty adjustment circuit includes

a voltage-dividing circuit which has a plurality of resistors coupled in series between a power supply node and a ground node, and is configured to output a plurality of divisional voltages divided in voltage by the plurality of resistors, and

a selection circuit configured to select any one of the divisional voltages as the bias voltage.

5. The circuit device according to claim 1 , wherein

a temperature compensation voltage is input to the one end of the variable capacitance element.

6. The circuit device according to claim 5 , wherein

the duty adjustment circuit includes

a voltage-dividing circuit which has a plurality of resistors coupled in series between a power supply node and a ground node, and is configured to output a plurality of divisional voltages divided in voltage by the plurality of resistors, and

a selection circuit configured to select a first divisional voltage which is one of the divisional voltages as the bias voltage, and select a second divisional voltage which is one of the divisional voltages as the reference voltage.

7. The circuit device according to claim 5 , wherein

denoting the temperature compensation voltage by VCMP and the reference voltage by VREF, the duty adjustment circuit supplies the reference voltage with which VCMP-VREF becomes higher than 0 V.

8. The circuit device according to claim 5 , wherein denoting the temperature compensation voltage by VCMP and the reference voltage by VREF, the duty adjustment circuit supplies the reference voltage with which VCMP-VREF becomes no higher than 0 V.

9. The circuit device according to claim 1 further comprising:

an output buffer circuit configured to buffer the clock signal, and then output an output clock signal to an outside.

10. An oscillator comprising:

the circuit device according to claim 1 ; and

the resonator.

11. The circuit device according to claim 1 , wherein

the bias voltage is higher than the reference voltage.